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[209.132.180.67]) by mx.google.com with ESMTP id e36si5303191pgm.17.2019.07.11.22.29.38; Thu, 11 Jul 2019 22:29:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LTGjy4Rb; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726062AbfGLF3h (ORCPT + 13 others); Fri, 12 Jul 2019 01:29:37 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:43940 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725791AbfGLF3h (ORCPT ); Fri, 12 Jul 2019 01:29:37 -0400 Received: by mail-pl1-f194.google.com with SMTP id cl9so4183467plb.10 for ; Thu, 11 Jul 2019 22:29:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZERHer/S6V7v3IyXGHBRQXsjn5NA4nSXv7B2aoThKNw=; b=LTGjy4RbPjl9R3s4FBJE7KxiWqlXV2Jf5Pd7wO0KzlxPr4SUYEcUciTXuVXj7usHms PBQ0GacQJxLledV6d0cVnlYP7EdoN0ibucpvd5Ox2iDnM4lDcvrfAwBw9U3rins3V+uC C8hekJ0VKJ136OK57vbzVb/TQ2PkcO7zGjqhj+zavYVK/VEoiPLQXx5n5kxQm+P2TCHu QhCYjQR9YE9M+lQtk+SbouEYzEG5+J9vd5nBHptbGKNBegltTaQCKUt7YlzFwAelFi3i qFYfmRpohadOUJwGsZgQSyedLaAGEjxeLe/Fn5VrzZ0NCbgkUnncJO0AbbF5RRNRniql Ok3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZERHer/S6V7v3IyXGHBRQXsjn5NA4nSXv7B2aoThKNw=; b=JIx8lxTEXCoz0656elWgJ/CvVdXLXQgGVUhLXvCGMJ3c+VDJfoqPH6ZMNdg3HW3Ris Jkvyl/4lFFgTYEUtmOLUaQ6OBRAlDGnb2VRH+wXTDcR3tTdUj9QebLx/tIU3H8BB/Bgl GRQLKwHPBsYPSqIx91noHUz3pzCgZObNc/GPq31yw1RyeUaGO1xmCo9MHbJEXzkl3CtR mmWGGVCceGW9i/Q1vSK09YRWxXJWvziIBdr6/mIIQ6bHeE0lF7us+tclKCc2HqyEY+MM hFvHtmE9DBo+Vkgew/SRXb9ksfPhtbD9ALbBVUU2bR8fP5n9WwOERuWcHUTLGojx9lDh Kfmg== X-Gm-Message-State: APjAAAVXHfOqEwX1ZKHt9Zn256OoegjUyqKlZ4QtYD+kEUvhi8EAqwIi KwfEjKMOVAfk/Gsm4enGeTMQallSkpk= X-Received: by 2002:a17:902:8b88:: with SMTP id ay8mr8861169plb.139.1562909376770; Thu, 11 Jul 2019 22:29:36 -0700 (PDT) Received: from localhost ([122.172.28.117]) by smtp.gmail.com with ESMTPSA id n98sm6937170pjc.26.2019.07.11.22.29.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Jul 2019 22:29:36 -0700 (PDT) From: Viresh Kumar To: stable@vger.kernel.org, Julien Thierry Cc: Viresh Kumar , linux-arm-kernel@lists.infradead.org, Catalin Marinas , Marc Zyngier , Mark Rutland , Will Deacon , Russell King , Vincent Guittot , mark.brown@arm.com Subject: [PATCH v4.4 V2 14/43] arm64: Introduce cpu_die_early Date: Fri, 12 Jul 2019 10:58:02 +0530 Message-Id: X-Mailer: git-send-email 2.21.0.rc0.269.g1a574e7a288b In-Reply-To: References: MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Suzuki K Poulose commit ee02a15919cf86c004142edaa05b43f7ff10edf0 upstream. Or in other words, make fail_incapable_cpu() reusable. We use fail_incapable_cpu() to kill a secondary CPU early during the bringup, which doesn't have the system advertised capabilities. This patch makes the routine more generic, to kill a secondary booting CPU, getting rid of the dependency on capability struct. This can be used by checks which are not necessarily attached to a capability struct (e.g, cpu ASIDBits). In that process, renames the function to cpu_die_early() to better match its functionality. This will be moved to arch/arm64/kernel/smp.c later. Cc: Mark Rutland Acked-by: Will Deacon Signed-off-by: Suzuki K Poulose Signed-off-by: Catalin Marinas Signed-off-by: Viresh Kumar --- arch/arm64/kernel/cpufeature.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) -- 2.21.0.rc0.269.g1a574e7a288b diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index d0c82bc02de4..b7f01bf47988 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -853,15 +853,15 @@ static inline void set_sys_caps_initialised(void) } /* - * Park the CPU which doesn't have the capability as advertised - * by the system. + * Kill the calling secondary CPU, early in bringup before it is turned + * online. */ -static void fail_incapable_cpu(char *cap_type, - const struct arm64_cpu_capabilities *cap) +void cpu_die_early(void) { int cpu = smp_processor_id(); - pr_crit("CPU%d: missing %s : %s\n", cpu, cap_type, cap->desc); + pr_crit("CPU%d: will not boot\n", cpu); + /* Mark this CPU absent */ set_cpu_present(cpu, 0); @@ -902,8 +902,11 @@ void verify_local_cpu_capabilities(void) * If the new CPU misses an advertised feature, we cannot proceed * further, park the cpu. */ - if (!feature_matches(__raw_read_system_reg(caps[i].sys_reg), &caps[i])) - fail_incapable_cpu("arm64_features", &caps[i]); + if (!feature_matches(__raw_read_system_reg(caps[i].sys_reg), &caps[i])) { + pr_crit("CPU%d: missing feature: %s\n", + smp_processor_id(), caps[i].desc); + cpu_die_early(); + } if (caps[i].enable) caps[i].enable(NULL); } @@ -911,8 +914,11 @@ void verify_local_cpu_capabilities(void) for (i = 0, caps = arm64_hwcaps; caps[i].matches; i++) { if (!cpus_have_hwcap(&caps[i])) continue; - if (!feature_matches(__raw_read_system_reg(caps[i].sys_reg), &caps[i])) - fail_incapable_cpu("arm64_hwcaps", &caps[i]); + if (!feature_matches(__raw_read_system_reg(caps[i].sys_reg), &caps[i])) { + pr_crit("CPU%d: missing HWCAP: %s\n", + smp_processor_id(), caps[i].desc); + cpu_die_early(); + } } }