From patchwork Wed Jul 24 16:25:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 169628 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp10466700ilk; Wed, 24 Jul 2019 09:26:19 -0700 (PDT) X-Google-Smtp-Source: APXvYqzSME3BgSLN5cErLvAEzQr8Tm6ddWXq1EY4g+0j6sd/WAvC6IYC53IolKJ1kRhbw9VOUKW+ X-Received: by 2002:a62:1b0c:: with SMTP id b12mr11955410pfb.17.1563985579848; Wed, 24 Jul 2019 09:26:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563985579; cv=none; d=google.com; s=arc-20160816; b=voPF9L2RKM7j+ZPQ2DvRHvmdzHcDkuvTUOEbnwNycFgvW6gF7VyEt9RH56YIk2Qo/u bm6S2QSbd+jwq4lxmFj0NfPVNZ6jdbt/PGufXruGZYFJQw8PvFHxz5CbpI903kZ+fwey kwpnvmdpIussYgHCJS+Mn3r3a5wzMoSPOfWNEXoH1+0cc5CHXEdFBlM84X8F+ehLy2fT xvEUDUreAdGZ1UNLWHaa4BBw7bdupqC0tWp4mvoB2bySVOkCfnEL4LKUGAUKN4u9UHwd vB+pTqelvKBBn07XVd1QNLXyTRMcJTrecb2qBHCDOdFHK35xG9aiMaVGaS0nR4U1pRej NXKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=i1SxRKXE9EM6PmUEbxGh33CclDwiEKzzY0sgZ5QqxwY=; b=MA5xrAImTl0H3HwiAeNCkvR5Ij3hGgk9FvgbXUoAI6lgkgAHZ01NzdXn1Ji/0Q1rb4 U2V67wZfbcp+3M980D57rMQd+ID7nOc+uuYWiwmR4lx4a9xg/Wi7LxeibxrXWOX540+L ymSGp56JdrC/08bp+p8T+zmLhPw+IQ3VLg85uw1uk1gi4tpqvJz+RUfYSgffDAuVj0Kx 1HTTFm4T1fbdhWmd4NsmaC0s2+9SdpW9T0/biKhTBCe+Ma5eTM2+NPg0JXmcFZ+wb7yQ 0mx18CwtRXGP6oFAYVNL8ZJFOdaCiksentmJpozfTt6zIFVmSXNgn9GN+l2fx+Y2opGl i0vw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p8si12873638plq.53.2019.07.24.09.26.19; Wed, 24 Jul 2019 09:26:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728924AbfGXQ0O (ORCPT + 29 others); Wed, 24 Jul 2019 12:26:14 -0400 Received: from foss.arm.com ([217.140.110.172]:43456 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727679AbfGXQ0J (ORCPT ); Wed, 24 Jul 2019 12:26:09 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3C0BE15A2; Wed, 24 Jul 2019 09:26:09 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DB3A53F71F; Wed, 24 Jul 2019 09:26:07 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu Cc: james.morse@arm.com, marc.zyngier@arm.com, julien.thierry@arm.com, suzuki.poulose@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Julien Grall Subject: [PATCH v3 14/15] arch/arm64: Introduce a capability to tell whether 16-bit VMID is available Date: Wed, 24 Jul 2019 17:25:33 +0100 Message-Id: <20190724162534.7390-15-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190724162534.7390-1-julien.grall@arm.com> References: <20190724162534.7390-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org At the moment, the function kvm_get_vmid_bits() is looking up for the sanitized value of ID_AA64MMFR1_EL1 and extract the information regarding the number of VMID bits supported. This is fine as the function is mainly used during VMID roll-over. New use in a follow-up patch will require the function to be called a every context switch so we want the function to be more efficient. A new capability is introduced to tell whether 16-bit VMID is available. Signed-off-by: Julien Grall --- Changes in v3: - Patch added --- arch/arm64/include/asm/cpucaps.h | 3 ++- arch/arm64/include/asm/kvm_mmu.h | 4 +--- arch/arm64/kernel/cpufeature.c | 9 +++++++++ 3 files changed, 12 insertions(+), 4 deletions(-) -- 2.11.0 diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h index f19fe4b9acc4..af8ab758b252 100644 --- a/arch/arm64/include/asm/cpucaps.h +++ b/arch/arm64/include/asm/cpucaps.h @@ -52,7 +52,8 @@ #define ARM64_HAS_IRQ_PRIO_MASKING 42 #define ARM64_HAS_DCPODP 43 #define ARM64_WORKAROUND_1463225 44 +#define ARM64_HAS_16BIT_VMID 45 -#define ARM64_NCAPS 45 +#define ARM64_NCAPS 46 #endif /* __ASM_CPUCAPS_H */ diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index befe37d4bc0e..2ce8055a84b8 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -413,9 +413,7 @@ static inline void __kvm_extend_hypmap(pgd_t *boot_hyp_pgd, static inline unsigned int kvm_get_vmid_bits(void) { - int reg = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1); - - return (cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR1_VMIDBITS_SHIFT) == 2) ? 16 : 8; + return cpus_have_const_cap(ARM64_HAS_16BIT_VMID) ? 16 : 8; } /* diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index f29f36a65175..b401e56af35a 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -1548,6 +1548,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .min_field_value = 1, }, #endif + { + .capability = ARM64_HAS_16BIT_VMID, + .type = ARM64_CPUCAP_SYSTEM_FEATURE, + .sys_reg = SYS_ID_AA64MMFR1_EL1, + .field_pos = ID_AA64MMFR1_VMIDBITS_SHIFT, + .sign = FTR_UNSIGNED, + .min_field_value = ID_AA64MMFR1_VMIDBITS_16, + .matches = has_cpuid_feature, + }, {}, };