From patchwork Mon Jul 29 20:25:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Desaulniers X-Patchwork-Id: 170030 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp1707026ile; Mon, 29 Jul 2019 13:26:14 -0700 (PDT) X-Google-Smtp-Source: APXvYqwryDyAcSrEmItY5/vM/DZpM5YshDSEOseXbTMMqD10Jb7wXVOpx3buEwVj8XJZMnmbVS++ X-Received: by 2002:a17:90a:37ac:: with SMTP id v41mr108815237pjb.6.1564431973895; Mon, 29 Jul 2019 13:26:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1564431973; cv=none; d=google.com; s=arc-20160816; b=DHH4yFNl5SGWBYlQleTMWnqvvungRYGWxPKYu9beupLV1OAK6R42V3XyZgxUuWdZ9X O1ipMfSfEODBb3X41mmDxKDM48fisiMKofNddMgvcAKjkekH4EsoTr1qn0uKObd0BVAb EJ9wZUeqLX4Cferl4XbNtDqWUnk1/iGh1BY05kZGf3EQvtxh7dG784wmuiek+12NZuek K2+yOF7jvqFLqFWLuNIbDzWueBlrZ1XAYelT9aqHQFUo8eEUn26CQ8+E/zfttrRTgVZp 7FC+89TwOzDPc4JcqtqPygP1vYOlTqdLX8j5yrDv/vdczvGdo6SQ0+IZlkBzO3GHOSWl VdXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:from:subject:mime-version :message-id:date:dkim-signature; bh=InkWYbyakoin4kW7joWmSnOT6nnJvOIEoZKfiSX6FXM=; b=bLHAEh/qrQQdvt1fNbfhnMdzwa01NS8AgWnJLGOrKMSRxtEAH0V97NgL/8waSIyonD O/QETBJS8zMsnxdtuHu/zpXx9STL/RO0qXC0+DDKClvpD0ALwsRwx23nASRcwDlhHZDK zzKush/v1iyPwzbKG9Hl3fV+w+OlCooX/aXDZ3uiWIvZa0p9auWGhALgleQOfVahK8n9 4y0jZnTV+qEHF+vohktioljjIgmBWwVs29/q307HW3Xg8w5Nm2TdhUy5LvpMU8HWYH/+ ZK7iSoi52meJtInCO+vmuEidhZe8QcP+coYt7+H+YpQgDACqohdaeGIUtAi3tDuM6AJV 57eA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=NrH9CP3j; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w15si29154261ply.127.2019.07.29.13.26.13; Mon, 29 Jul 2019 13:26:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=NrH9CP3j; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729120AbfG2U0M (ORCPT + 29 others); Mon, 29 Jul 2019 16:26:12 -0400 Received: from mail-pl1-f201.google.com ([209.85.214.201]:43466 "EHLO mail-pl1-f201.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725975AbfG2U0M (ORCPT ); Mon, 29 Jul 2019 16:26:12 -0400 Received: by mail-pl1-f201.google.com with SMTP id t2so33809533plo.10 for ; Mon, 29 Jul 2019 13:26:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:message-id:mime-version:subject:from:to:cc; bh=InkWYbyakoin4kW7joWmSnOT6nnJvOIEoZKfiSX6FXM=; b=NrH9CP3j3IaEZeQTRPUpaINe6R+O0NeUPVTiKEqR6ZRIdxWO6b0hnLm51vp8WpodBt b6YZ/M3SVAVCFf3UurTkKgjdqsG/kQ8nQYh7BWrOOjkRKhtlE1ly2pEUBUWxk6GGbYm8 1ArC7a1eS8zanTLR4ftZoAMpPBBnZ9ajFP2RpwM+A1dCeK8QIzBW1wpVAYqB7Uuom3Lo CoBW1LSDZajNANwdP5yg7IcmAWWiInk7VkArgc5DgBwQrWjtWw6B0CmJ+6WQc8lHqx03 m3b2v59YP42soakHigmlcSIQP5KCqXM6lb/979S2CV6wnYKKJK5lJX989prCYbKth+Ai M+NA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:message-id:mime-version:subject:from:to:cc; bh=InkWYbyakoin4kW7joWmSnOT6nnJvOIEoZKfiSX6FXM=; b=gNuVQOcWbP7+Av0gXOsjlzkbqiVAPMYiqONG4IPDyXVQqb86Ob9gAuicqeax0ESd70 BWvrVDIdPD4w7SGOSk4u128+LU5AqQ48xLYpT/7zLeNNWrGiKD2/Pys42OU3bA6LomRw 5tvSXXaIaZim0U0CRoAgEPnm2/Di7vTUwqhotkfZYek0yD4Z9Rt88l3V4gP4cbISdGNT 4tLCfItYYv7B5zTqdFRYNDJ4PdmYon2cPCm28E5ZN9wCL70K921qv5Y9CgVQJJyXl8pw tNws+vFrs9M1t+Vc2Uv4M4jC8nXIQ7GQ04bLONDfdJv7UHgPlKqZFhSNcZ/RORjao5Ql MYjw== X-Gm-Message-State: APjAAAUfDNKhVft+VenBz2qPXHXXiEZBiLhQCjD6G94vv+O7LGRKeNm3 kdINWR5gtEbXcv8CpvFUzS1kxmFvPLDk7/Rgg68= X-Received: by 2002:a63:5b52:: with SMTP id l18mr106138942pgm.21.1564431971070; Mon, 29 Jul 2019 13:26:11 -0700 (PDT) Date: Mon, 29 Jul 2019 13:25:41 -0700 Message-Id: <20190729202542.205309-1-ndesaulniers@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.22.0.709.g102302147b-goog Subject: [PATCH] powerpc: workaround clang codegen bug in dcbz From: Nick Desaulniers To: mpe@ellerman.id.au Cc: christophe.leroy@c-s.fr, segher@kernel.crashing.org, arnd@arndb.de, Nick Desaulniers , Nathan Chancellor , kbuild test robot , Benjamin Herrenschmidt , Paul Mackerras , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, clang-built-linux@googlegroups.com Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit 6c5875843b87 ("powerpc: slightly improve cache helpers") exposed what looks like a codegen bug in Clang's handling of `%y` output template with `Z` constraint. This is resulting in panics during boot for 32b powerpc builds w/ Clang, as reported by our CI. Add back the original code that worked behind a preprocessor check for __clang__ until we can fix LLVM. Further, it seems that clang allnoconfig builds are unhappy with `Z`, as reported by 0day bot. This is likely because Clang warns about inline asm constraints when the constraint requires inlining to be semantically valid. Link: https://bugs.llvm.org/show_bug.cgi?id=42762 Link: https://github.com/ClangBuiltLinux/linux/issues/593 Link: https://lore.kernel.org/lkml/20190721075846.GA97701@archlinux-threadripper/ Debugged-by: Nathan Chancellor Reported-by: Nathan Chancellor Reported-by: kbuild test robot Suggested-by: Nathan Chancellor Signed-off-by: Nick Desaulniers --- Alternatively, we could just revert 6c5875843b87. It seems that GCC generates the same code for these functions for out of line versions. But I'm not sure how the inlined code generated would be affected. arch/powerpc/include/asm/cache.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) -- 2.22.0.709.g102302147b-goog Reviewed-by: Nathan Chancellor diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index b3388d95f451..72983da94dce 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h @@ -105,6 +105,30 @@ extern void _set_L3CR(unsigned long); #define _set_L3CR(val) do { } while(0) #endif +/* + * Workaround for https://bugs.llvm.org/show_bug.cgi?id=42762. + */ +#ifdef __clang__ +static inline void dcbz(void *addr) +{ + __asm__ __volatile__ ("dcbz 0, %0" : : "r"(addr) : "memory"); +} + +static inline void dcbi(void *addr) +{ + __asm__ __volatile__ ("dcbi 0, %0" : : "r"(addr) : "memory"); +} + +static inline void dcbf(void *addr) +{ + __asm__ __volatile__ ("dcbf 0, %0" : : "r"(addr) : "memory"); +} + +static inline void dcbst(void *addr) +{ + __asm__ __volatile__ ("dcbst 0, %0" : : "r"(addr) : "memory"); +} +#else static inline void dcbz(void *addr) { __asm__ __volatile__ ("dcbz %y0" : : "Z"(*(u8 *)addr) : "memory"); @@ -124,6 +148,7 @@ static inline void dcbst(void *addr) { __asm__ __volatile__ ("dcbst %y0" : : "Z"(*(u8 *)addr) : "memory"); } +#endif /* __clang__ */ #endif /* !__ASSEMBLY__ */ #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_CACHE_H */