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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id t9sm24347921pji.18.2019.08.06.21.53.48 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 06 Aug 2019 21:53:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 6 Aug 2019 21:53:29 -0700 Message-Id: <20190807045335.1361-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190807045335.1361-1-richard.henderson@linaro.org> References: <20190807045335.1361-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::443 Subject: [Qemu-devel] [PATCH 05/11] target/arm: Remove redundant s->pc & ~1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The thumb bit has already been removed from s->pc, and is always even. Signed-off-by: Richard Henderson --- target/arm/translate.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/target/arm/translate.c b/target/arm/translate.c index 71d94c053b..100f958e33 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1288,7 +1288,7 @@ static void gen_exception_bkpt_insn(DisasContext *s, int offset, uint32_t syn) /* Force a TB lookup after an instruction that changes the CPU state. */ static inline void gen_lookup_tb(DisasContext *s) { - tcg_gen_movi_i32(cpu_R[15], s->pc & ~1); + tcg_gen_movi_i32(cpu_R[15], s->pc); s->base.is_jmp = DISAS_EXIT; } @@ -7819,7 +7819,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) * self-modifying code correctly and also to take * any pending interrupts immediately. */ - gen_goto_tb(s, 0, s->pc & ~1); + gen_goto_tb(s, 0, s->pc); return; case 7: /* sb */ if ((insn & 0xf) || !dc_isar_feature(aa32_sb, s)) { @@ -7830,7 +7830,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) * for TCG; MB and end the TB instead. */ tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); - gen_goto_tb(s, 0, s->pc & ~1); + gen_goto_tb(s, 0, s->pc); return; default: goto illegal_op; @@ -10464,7 +10464,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn) * and also to take any pending interrupts * immediately. */ - gen_goto_tb(s, 0, s->pc & ~1); + gen_goto_tb(s, 0, s->pc); break; case 7: /* sb */ if ((insn & 0xf) || !dc_isar_feature(aa32_sb, s)) { @@ -10475,7 +10475,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn) * for TCG; MB and end the TB instead. */ tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); - gen_goto_tb(s, 0, s->pc & ~1); + gen_goto_tb(s, 0, s->pc); break; default: goto illegal_op;