diff mbox series

[6/6,v2] RFT: gpio: uniphier: Restrict valid interrupts

Message ID 20190808123242.5359-6-linus.walleij@linaro.org
State New
Headers show
Series [1/6,v2] gpio: Add support for hierarchical IRQ domains | expand

Commit Message

Linus Walleij Aug. 8, 2019, 12:32 p.m. UTC 
The Uniphier GPIO can only create interrupt mappings on
GPIOs offset 0..23. Set the valid_mask in the struct
gpio_irqchip and clear bits 24..ngpios indicating that
these can not be mapped to interrupts.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Brian Masney <masneyb@onstation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

---
ChangeLog RFT -> RTF v2:
- New patch to set the valid mask for the interrupts.
---
 drivers/gpio/gpio-uniphier.c | 5 +++++
 1 file changed, 5 insertions(+)

-- 
2.21.0
diff mbox series

Patch

diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c
index 86e8446215fc..9840fcf7de57 100644
--- a/drivers/gpio/gpio-uniphier.c
+++ b/drivers/gpio/gpio-uniphier.c
@@ -338,6 +338,7 @@  static int uniphier_gpio_probe(struct platform_device *pdev)
 	girq->child_to_parent_hwirq = uniphier_gpio_child_to_parent_hwirq;
 	girq->handler = handle_bad_irq;
 	girq->default_type = IRQ_TYPE_NONE;
+	girq->need_valid_mask = true;
 
 	uniphier_gpio_hw_init(priv);
 
@@ -345,6 +346,10 @@  static int uniphier_gpio_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
+	/* Only GPIOs 0..UNIPHIER_GPIO_IRQ_MAX_NUM are valid for interrupts */
+	bitmap_clear(girq->valid_mask, UNIPHIER_GPIO_IRQ_MAX_NUM,
+		     ngpios - UNIPHIER_GPIO_IRQ_MAX_NUM);
+
 	platform_set_drvdata(pdev, priv);
 
 	return 0;