From patchwork Fri Aug 9 14:40:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 170943 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp10105855ile; Fri, 9 Aug 2019 07:46:05 -0700 (PDT) X-Google-Smtp-Source: APXvYqxbYwNPXcbAx7DOfONTPz92ocyA8Myub8Rc3KlDwnWF5sbbGvJZ26MwhZSX2fv2aaHLMUxR X-Received: by 2002:a63:6f41:: with SMTP id k62mr17816643pgc.32.1565361965265; Fri, 09 Aug 2019 07:46:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565361965; cv=none; d=google.com; s=arc-20160816; b=oJHa8wguB0aJS8Cpc8chATgtRCcDfumeFXNBT+jjswVPQMrysYtuUgmywzY7bohLjX 8H4Izv/VJWQmrPwUFGduSZQ+/og0q147PUi8vaYTWanS7lB3zwfjZYAgf0/sW/1Y8qHa aHxfG9T3J7J2NA3mFSfBFH77IDeCXejG9b1KPFso6fP6/BK98URMaFyRWX3mMQaNuhU0 sJ3SOaVJLDetMAL5nOdf0pZDICJotxHvmouOY0sm91MoLJtOJyNtMxYTT5hp97UHLKhb 6Z/HE3tNhoonh8YTSIkiTFJ+zOzjxtLdLwUHi1s+uItlcyz/HdCxk5T36B7XA7ZFQn5S au7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=zvkodgCrUb7vWKK6pr/2TYyCRcAnf89cCDMvJOucx5I=; b=z/VJIBksnQSNJLmSwhWwvzvuLp+pz1BVx0ichCRNKrdt9czPQvZ47wqxO6jzc7lw1o JhZlcWVzd6A04EPylhPc8V8aKH6CmhdHKkCFGjE2TU5HOnP3HfiCjeb1fgOx+ztvLhr6 Fj70w2UrPaY1IGsckHvfgk9UE3Hugh3ouwZyB/jZZlO/iPqDIOBNTZqgWwUDU8EnB+nE IzbiH+NgFrjCJaqxVbt4SX1/dd06lCmyY+D6mbEnoglxBdwWllkLUblNWx8ehotKrXn9 z57P9Cm+qf6D5bGeNCkHJ9/gP4foO663HUXNon7UfXYKNR1hKBr1x10OzfShV1DFdCVy 6Y7Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m7si54778579pls.110.2019.08.09.07.46.05; Fri, 09 Aug 2019 07:46:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726157AbfHIOqE (ORCPT + 1 other); Fri, 9 Aug 2019 10:46:04 -0400 Received: from mout.kundenserver.de ([212.227.126.134]:58941 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2406127AbfHIOqE (ORCPT ); Fri, 9 Aug 2019 10:46:04 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1N79Ey-1iNaIe1kU8-017V2R; Fri, 09 Aug 2019 16:45:20 +0200 From: Arnd Bergmann To: soc@kernel.org Cc: Vladimir Zapolskiy , Sylvain Lemieux , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Greg Kroah-Hartman , Jiri Slaby , linux-serial@vger.kernel.org Subject: [PATCH v2 11/13] serial: lpc32xx: allow compile testing Date: Fri, 9 Aug 2019 16:40:37 +0200 Message-Id: <20190809144043.476786-12-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190809144043.476786-1-arnd@arndb.de> References: <20190809144043.476786-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:QSyZAIrEK0tisvxeshqXx4Yf121VPR+VVNYcnXCO8jzU+Wj3Ush I/ukpTsjSD50wlu5mlErjvyyjoC7r5ZaE9gO6Bzq5JQB8kvQN/7/3zM8Bih+zpxqpE1wyo4 T5ehI8/mM/L7wAgH4tcbxV4iEiOQijuNX2En16g/UAdInN5IC+HSJHS6z7Tyg1No1B2si8l 19wPbeSZDJ1CNo4wggS2A== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:VJCyh49joGQ=:hiDrY4RgZVRXKwVAgZwTaF zd/yvwV5BTZewhK51/lohRaZMa4Ns09MbbfjiVlXLr5F+LAzi3ITNBjb79lgUU0Y3zS5zA0Gg 6fMw1KccRDUHKbZ7nR5vc3++tNjZAY8jtUo8K1uTy7g7c8fU29PKEi1rzwGZofnn7OUmhCK9/ +SoDdtlr/BCbvIO8lImCdQ6JUpVEhWW2ZW6skW9CBes3Aud4FKEi2N/AEreZqioOOYxOxVVbC E7ZXajHg0vvQvFwqJKTMEHyssG8oGufrB2rl2mltwc/9AyeWX5gLPnrgwwGKAYieJgrHBKd90 2hdrZOhAt6ju6w3H7zepU+DH3gSl8nopfVfESIfOH708xGNuc9p3bDTiq61nsIza3PM7gCmGs w44mJQY5PlsPIGTFdlzKnJy+xhElyaG3CbTYGUBn0lngXe6pEAah6teBvuIhbhe9z2KbBoVae xL6OnSGYwiKhBS2tq0YmF+AN4Cvv6dq7t68dsK24GOgio4AyGLVg7DLrJhguVowEXjR3qAqSU vyvia2c9x7tzYcRE2DvRfP7km8GnHCORRT34OKCUqNiMD5pwREOpwFiU0AO86WFKuZhxzydlG uheyaIfuS+5sTAUwai+7fYv+NvzQ5wIxwI/1kz6tLkzmBBAQVrvXoHqxhfqmgJAcwNoa3YLnr Ok37nwVz4h+iJIXlt6wzL8C3QHsoOhlH4hXBTMxqosmMvDo5Skz356oB7K+CDQDhQAaVW9Kuu C3BZGQW5BFpJC6DTSfIJQyquZnDaMZQUeE0TuA== Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org The lpc32xx_loopback_set() function in hte lpc32xx_hs driver is the one thing that relies on platform header files. Move that into the core platform code so we only need a variable declaration for it, and enable COMPILE_TEST building. Signed-off-by: Arnd Bergmann --- arch/arm/mach-lpc32xx/serial.c | 30 ++++++++++++++++++++++++ drivers/tty/serial/lpc32xx_hs.c | 35 ++++------------------------ include/linux/soc/nxp/lpc32xx-misc.h | 4 ++++ 3 files changed, 38 insertions(+), 31 deletions(-) -- 2.20.0 Acked-by: Greg Kroah-Hartman diff --git a/arch/arm/mach-lpc32xx/serial.c b/arch/arm/mach-lpc32xx/serial.c index 3f9b30df9f0e..cfb35e5691cd 100644 --- a/arch/arm/mach-lpc32xx/serial.c +++ b/arch/arm/mach-lpc32xx/serial.c @@ -60,6 +60,36 @@ static struct uartinit uartinit_data[] __initdata = { }, }; +/* LPC3250 Errata HSUART.1: Hang workaround via loopback mode on inactivity */ +void lpc32xx_loopback_set(resource_size_t mapbase, int state) +{ + int bit; + u32 tmp; + + switch (mapbase) { + case LPC32XX_HS_UART1_BASE: + bit = 0; + break; + case LPC32XX_HS_UART2_BASE: + bit = 1; + break; + case LPC32XX_HS_UART7_BASE: + bit = 6; + break; + default: + WARN(1, "lpc32xx_hs: Warning: Unknown port at %08x\n", mapbase); + return; + } + + tmp = readl(LPC32XX_UARTCTL_CLOOP); + if (state) + tmp |= (1 << bit); + else + tmp &= ~(1 << bit); + writel(tmp, LPC32XX_UARTCTL_CLOOP); +} +EXPORT_SYMBOL_GPL(lpc32xx_loopback_set); + void __init lpc32xx_serial_init(void) { u32 tmp, clkmodes = 0; diff --git a/drivers/tty/serial/lpc32xx_hs.c b/drivers/tty/serial/lpc32xx_hs.c index 7f14cd8fac47..d3843f722182 100644 --- a/drivers/tty/serial/lpc32xx_hs.c +++ b/drivers/tty/serial/lpc32xx_hs.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include /* * High Speed UART register offsets @@ -79,6 +81,8 @@ #define LPC32XX_HSU_TX_TL8B (0x2 << 0) #define LPC32XX_HSU_TX_TL16B (0x3 << 0) +#define LPC32XX_MAIN_OSC_FREQ 13000000 + #define MODNAME "lpc32xx_hsuart" struct lpc32xx_hsuart_port { @@ -149,8 +153,6 @@ static void lpc32xx_hsuart_console_write(struct console *co, const char *s, local_irq_restore(flags); } -static void lpc32xx_loopback_set(resource_size_t mapbase, int state); - static int __init lpc32xx_hsuart_console_setup(struct console *co, char *options) { @@ -437,35 +439,6 @@ static void serial_lpc32xx_break_ctl(struct uart_port *port, spin_unlock_irqrestore(&port->lock, flags); } -/* LPC3250 Errata HSUART.1: Hang workaround via loopback mode on inactivity */ -static void lpc32xx_loopback_set(resource_size_t mapbase, int state) -{ - int bit; - u32 tmp; - - switch (mapbase) { - case LPC32XX_HS_UART1_BASE: - bit = 0; - break; - case LPC32XX_HS_UART2_BASE: - bit = 1; - break; - case LPC32XX_HS_UART7_BASE: - bit = 6; - break; - default: - WARN(1, "lpc32xx_hs: Warning: Unknown port at %08x\n", mapbase); - return; - } - - tmp = readl(LPC32XX_UARTCTL_CLOOP); - if (state) - tmp |= (1 << bit); - else - tmp &= ~(1 << bit); - writel(tmp, LPC32XX_UARTCTL_CLOOP); -} - /* port->lock is not held. */ static int serial_lpc32xx_startup(struct uart_port *port) { diff --git a/include/linux/soc/nxp/lpc32xx-misc.h b/include/linux/soc/nxp/lpc32xx-misc.h index af4f82f6cf3b..699c6f1e3aab 100644 --- a/include/linux/soc/nxp/lpc32xx-misc.h +++ b/include/linux/soc/nxp/lpc32xx-misc.h @@ -14,6 +14,7 @@ #ifdef CONFIG_ARCH_LPC32XX extern u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr); extern void lpc32xx_set_phy_interface_mode(phy_interface_t mode); +extern void lpc32xx_loopback_set(resource_size_t mapbase, int state); #else static inline u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr) { @@ -24,6 +25,9 @@ static inline u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaadd static inline void lpc32xx_set_phy_interface_mode(phy_interface_t mode) { } +static inline void lpc32xx_loopback_set(resource_size_t mapbase, int state) +{ +} #endif #endif /* __SOC_LPC32XX_MISC_H */