From patchwork Thu Sep 12 13:26:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 173708 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp2127736ilq; Thu, 12 Sep 2019 06:26:37 -0700 (PDT) X-Google-Smtp-Source: APXvYqymNzUtTLMdX7lBmfKs78vtbErn94sGPJx0SUEpVkg4LwVidvcwljyZCft3SLmtatWdlLu2 X-Received: by 2002:a50:934c:: with SMTP id n12mr34302773eda.12.1568294797515; Thu, 12 Sep 2019 06:26:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568294797; cv=none; d=google.com; s=arc-20160816; b=FWj+Prdixa0Fow1yb6UlTQDBP7j8uNu7JV1JQ00H3uIUISbdoz7CafyQ3XYy/VNG2A F4M87zdJUweNe/bGHv+PGRq5DanOb1jsdJgqP70gouZETG9+AbDV9piGefou8zMGBl4+ zA1uSdiYgLZE8H9Z+lA10VgL1Wjl95FNa//6yfYIMCYLnFOdHVXlrnQ+DvtTNS+El8J1 WRU5BIxCbOPUVC2nzDLpKEicfgU4hSu4XFz1v36mqOk7cARpodibbDqvdA4x249AAl67 ZoPNcc8XFW+kfb+0xuvW8K9v5aa2XEIsa98TaiQxuxyrwe6XG9oE/zmyvi5rkKQ+19U+ 9W2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=fW+u/vGNd3Os0mTVhUYzxkOa/BShSQwBQHEQNFyKdFs=; b=Ssk1lZeZcsgXywExpHnr0nYSSifNHoqk+zXGWKqcC0RH4KHjpHVUO/lw/nINd3sxlI YLtBAHgZGWdpUNPj1I2WYgPmVVX1oRgHJztrAsOafij1JtirNtoXsvdckouSb0fh50UV N4BCI0VbWAhdd+sWgtg2JDjdyQkKhb4y8PjNCYAg6ySbbB6LLYJ5eWiFAI2Eic53vqRJ HQK9jJlMq/biKiNdT8S6kirsF9qSwSfcaPvGSJAtHS2QDe+7H5lY8gVL1rOCTJiAGqUt D8gopueeNPP7CgIZu45+bwo+hAXAdIHZYrPqVAqQVese29mHPZmdX3P+sMO1BkP1UN0y AelA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=V2hJTOnd; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s11si12814304ejz.384.2019.09.12.06.26.37; Thu, 12 Sep 2019 06:26:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=V2hJTOnd; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732111AbfILN0g (ORCPT + 5 others); Thu, 12 Sep 2019 09:26:36 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:41644 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732098AbfILN0g (ORCPT ); Thu, 12 Sep 2019 09:26:36 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x8CDQX32049558; Thu, 12 Sep 2019 08:26:33 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1568294793; bh=fW+u/vGNd3Os0mTVhUYzxkOa/BShSQwBQHEQNFyKdFs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=V2hJTOndcru4A2B+/0dj6uIigedP6zT8br+44ERD4Hul/owl+qMxuj/4pzkqOR2W/ ohXWxEva4Aj5SQ789rN1iQulJk5BonMZp6tzvGU8/50c4wWnR/nt9Y5HxYaudMpl2L 9nyJEGzo1CUdFj7MTynFe5qCTAPbPCQyHMQN9jqc= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x8CDQXdA053259 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 12 Sep 2019 08:26:33 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 12 Sep 2019 08:26:33 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 12 Sep 2019 08:26:33 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x8CDQFvX130575; Thu, 12 Sep 2019 08:26:31 -0500 From: Tero Kristo To: , , , CC: , Subject: [PATCHv3 08/10] clk: ti: omap5: Drop idlest polling from IPU & DSP clkctrl clocks Date: Thu, 12 Sep 2019 16:26:11 +0300 Message-ID: <20190912132613.28093-9-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190912132613.28093-1-t-kristo@ti.com> References: <20190912132613.28093-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna The IPU and DSP remote processor cores and their corresponding MMUs on OMAP5 SoCs have hardreset lines associated with them and are controlled by a PRCM reset line each. Any clkctrl enable/disable operations cannot be checked for module enabled/disabled status independent of the reset operation, and this causes some unwanted timeouts in the kernel and unbalanced states for these clocks. These details should be handled by the driver integration code itself. Add the CLKF_NO_IDLEST flag to both the IPU and DSP clkctrl clocks so that these module status checks are skipped. Signed-off-by: Suman Anna --- drivers/clk/ti/clk-54xx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c index f63871dac600..b5e5658f614f 100644 --- a/drivers/clk/ti/clk-54xx.c +++ b/drivers/clk/ti/clk-54xx.c @@ -31,7 +31,7 @@ static const struct omap_clkctrl_reg_data omap5_mpu_clkctrl_regs[] __initconst = }; static const struct omap_clkctrl_reg_data omap5_dsp_clkctrl_regs[] __initconst = { - { OMAP5_MMU_DSP_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_h11x2_ck" }, + { OMAP5_MMU_DSP_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_iva_h11x2_ck" }, { 0 }, }; @@ -145,7 +145,7 @@ static const struct omap_clkctrl_reg_data omap5_l3main2_clkctrl_regs[] __initcon }; static const struct omap_clkctrl_reg_data omap5_ipu_clkctrl_regs[] __initconst = { - { OMAP5_MMU_IPU_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_core_h22x2_ck" }, + { OMAP5_MMU_IPU_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_core_h22x2_ck" }, { 0 }, };