From patchwork Fri Sep 13 11:35:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 173753 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp38030ilq; Fri, 13 Sep 2019 04:35:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqyY3G6shly0iu8ZKxAw+pzd6vEr5M4/AtDrzbEQwMcFLCtIVthzDfyfeSlPiZ5ar2aHjElo X-Received: by 2002:a50:9250:: with SMTP id j16mr47286068eda.160.1568374546457; Fri, 13 Sep 2019 04:35:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568374546; cv=none; d=google.com; s=arc-20160816; b=q5OG6+R9OQ5I6jW8u8Ir2NCeJpfsECdncSzsR4eXp9nnvmyilY1keU5D/Q3GwbgyIY FRcRjJAYfnoeptW1fn2BHW+8E8JV09mNC3OVwTWld55txephXLFuQQmEeXVNd569F/8J 2zcBNCs7LcKPpYDRlQb2u3g5XLkEkK7JAo3NXGbpbQDt29thiZE0Ece7Y6pqMHg0sHTi xI4WbAqFfCy5CywuvUqGm7lX8ElyS+fzd2M79WPEjoop5Nm0kRRhs5xel+JWUu4SkZP6 nSNWm1LH3NIH3huGtExku1bofX64UfgimBXPwNhs/is/w0eS61MfWwMK0QraapNj2pyd 5O5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/iNsOMpID3q2zsOyYQIhDoGSptuJapIiBbVcWgviOv8=; b=sfHSr6lv/jMj/FkvSeQK8rCANqxzVkJ7B3BH6iEDzCwxuEFfI8OreeVSUtOXN+/qt4 RlePSae9CP9NutUSShHOvoJ2kf8UWZmCWeeCK8kLMvMAoAzWfMdvbtui6csIDhgVSSUl t1b0d3Uy7xtg1lzYIveuggJ2Vvr9zU11gavEb4kSZL6NRfgwuN9/tTvrIh+Bmi8RJ9nU L7te5g3RIWy8VgTcmEC2N68qmG8k9oM/nVyxk/I1Th0qRU/5WdreImlwpTFDarW97hQv G/ZuqQwgRIwUsuACRKwq6exXOn4u8DPVcwKr4r2QACbi5NVAqoTyIowHQzoXq6m5SZ2i /vDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="twkc2kJ/"; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v5si17870968edm.313.2019.09.13.04.35.46; Fri, 13 Sep 2019 04:35:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="twkc2kJ/"; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728631AbfIMLfp (ORCPT + 5 others); Fri, 13 Sep 2019 07:35:45 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:40451 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727997AbfIMLfp (ORCPT ); Fri, 13 Sep 2019 07:35:45 -0400 Received: by mail-lj1-f196.google.com with SMTP id 7so26722389ljw.7 for ; Fri, 13 Sep 2019 04:35:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/iNsOMpID3q2zsOyYQIhDoGSptuJapIiBbVcWgviOv8=; b=twkc2kJ/SbFcCIamyZTxQMh+agBJF6dSjUFfU+V4dpPM0GzPmiWhqST8lqXOPUbQ3s Lc1OGUUsi+51wLR55dgH9Eae6RsV5wZMl48zU2ynMtwLst9dkV1OytbsVetrzqNCIx0l ngSl2/h9FFj0nPxgyRkDqeNvqaXIhEzVsJQRti9077gm1srKybn/9EFePjqzMdo2kEJs As9DH3YUtB59lv34oIsA/xQBlgYTjsc7y/yG/JOc3B0CgwYVuVGOqFWfpdxjCEeQlFMR qHatEjIw6IIkaSgMt5XOhIvzDj8g3itvwxxRuc69bxGvZXOj2hCrDQWIRV7l8hmn+thm 7DtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/iNsOMpID3q2zsOyYQIhDoGSptuJapIiBbVcWgviOv8=; b=bMZUrG4VNpAVxFJcTn12d0/9MRSWye/zKZce/Pi7sFuy7Uh3qoRTyzH30VBvgqv8vL W3LY+T854liORafBm3AwAmnmy5PMj8Pb393D4EvaQkqnbwPatQPWOOi7P6djYw5E3I1I B0wxwbZitfk2x77pBFwOn+zfY2eU/DPNdgENrS7YOZYZvyoG15DmBW6kQEZ/YHl36Qr4 mj3i2ycEMwriqyr1DG3QUpjCAOpwh/jqefNFDcfpNokD9sLgFJ/yHqI9KgoBzYkREx/B 2gnAR9sRLgKyguZxxcxCJy51bogMeLS0iWyI2cfGxTRWKfnn1A/TmM8xnek4oGrE2tby 9U0w== X-Gm-Message-State: APjAAAUqjdiCVc8r+qEG/H91uui9v/rQeCEdnD8DeiUUfUQMKO5NaxPH nqLaMJ1Rs1lcvtixXMz0hEM0ruomsJjL/XS0 X-Received: by 2002:a2e:9c87:: with SMTP id x7mr17704483lji.207.1568374543456; Fri, 13 Sep 2019 04:35:43 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id v17sm6177440ljh.8.2019.09.13.04.35.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2019 04:35:42 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski , Linus Walleij , Tomer Maimon , Kun Yi , Thierry Reding Subject: [PATCH 4/6] pinctrl: nuvoton: npcm7xx: Pass irqchip when adding gpiochip Date: Fri, 13 Sep 2019 13:35:28 +0200 Message-Id: <20190913113530.5536-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190913113530.5536-1-linus.walleij@linaro.org> References: <20190913113530.5536-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Tomer Maimon Cc: Kun Yi Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 32 +++++++++++------------ 1 file changed, 16 insertions(+), 16 deletions(-) -- 2.21.0 diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index 17f909d8b63a..22077cbe6880 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -1954,6 +1954,22 @@ static int npcm7xx_gpio_register(struct npcm7xx_pinctrl *pctrl) int ret, id; for (id = 0 ; id < pctrl->bank_num ; id++) { + struct gpio_irq_chip *girq; + + girq = &pctrl->gpio_bank[id].gc.irq; + girq->chip = &pctrl->gpio_bank[id].irq_chip; + girq->parent_handler = npcmgpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(pctrl->dev, 1, + sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) { + ret = -ENOMEM; + goto err_register; + } + girq->parents[0] = pctrl->gpio_bank[id].irq; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_level_irq; ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->gpio_bank[id].gc, &pctrl->gpio_bank[id]); @@ -1972,22 +1988,6 @@ static int npcm7xx_gpio_register(struct npcm7xx_pinctrl *pctrl) gpiochip_remove(&pctrl->gpio_bank[id].gc); goto err_register; } - - ret = gpiochip_irqchip_add(&pctrl->gpio_bank[id].gc, - &pctrl->gpio_bank[id].irq_chip, - 0, handle_level_irq, - IRQ_TYPE_NONE); - if (ret < 0) { - dev_err(pctrl->dev, - "Failed to add IRQ chip %u\n", id); - gpiochip_remove(&pctrl->gpio_bank[id].gc); - goto err_register; - } - - gpiochip_set_chained_irqchip(&pctrl->gpio_bank[id].gc, - &pctrl->gpio_bank[id].irq_chip, - pctrl->gpio_bank[id].irq, - npcmgpio_irq_handler); } return 0;