[AArch64,v4,1/6] aarch64: Extend %R for integer registers

Message ID	20190918015817.24408-2-richard.henderson@linaro.org
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Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of gcc-patches-return-509144-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=PDuqx2svmzwHM6Vvh16OjY+GN7sdxTlkM2oLVgVCROTl0VZb3W+/e P2J9g+GFJssnRWva3E4WSopIhsIHQC4u43UboOj3dCb29QdDFLc4y0hCKV+2VJuT QaHp3z3WRlcqJ73+5YcOJ7r+yDJw/9iT2RpOiFSWozVnLWqqm8NC6o= Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk Sender: gcc-patches-owner@gcc.gnu.org From: Richard Henderson <richard.henderson@linaro.org> To: gcc-patches@gcc.gnu.org Cc: Wilco.Dijkstra@arm.com, kyrylo.tkachov@foss.arm.com, Marcus.Shawcroft@arm.com, James.Greenhalgh@arm.com Subject: [PATCH, AArch64 v4 1/6] aarch64: Extend %R for integer registers Date: Tue, 17 Sep 2019 18:58:12 -0700 Message-Id: <20190918015817.24408-2-richard.henderson@linaro.org> In-Reply-To: <20190918015817.24408-1-richard.henderson@linaro.org> References: <20190918015817.24408-1-richard.henderson@linaro.org>
Series	LSE atomics out-of-line \| expand [AArch64,v4,0/6] LSE atomics out-of-line [AArch64,v4,1/6] aarch64: Extend %R for integer registers [AArch64,v4,2/6] aarch64: Implement TImode compare-and-swap [AArch64,v4,3/6] aarch64: Tidy aarch64_split_compare_and_swap [AArch64,v4,4/6] aarch64: Add out-of-line functions for LSE atomics [AArch64,v4,5/6] aarch64: Implement -moutline-atomics [AArch64,v4,6/6] TESTING: Enable -moutline-atomics by default

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	Marcus.Shawcroft@arm.com, James.Greenhalgh@arm.com
Subject: [PATCH, AArch64 v4 1/6] aarch64: Extend %R for integer registers
Date: Tue, 17 Sep 2019 18:58:12 -0700
Message-Id: <20190918015817.24408-2-richard.henderson@linaro.org>
In-Reply-To: <20190918015817.24408-1-richard.henderson@linaro.org>
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Series

LSE atomics out-of-line | expand

Commit Message

Richard Henderson Sept. 18, 2019, 1:58 a.m. UTC

* config/aarch64/aarch64.c (aarch64_print_operand): Allow integer
	registers with %R.
---
 gcc/config/aarch64/aarch64.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

-- 
2.17.1

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 232317d4a5a..99d51e2aef9 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -8420,7 +8420,7 @@  sizetochar (int size)
      'S/T/U/V':		Print a FP/SIMD register name for a register list.
 			The register printed is the FP/SIMD register name
 			of X + 0/1/2/3 for S/T/U/V.
-     'R':		Print a scalar FP/SIMD register name + 1.
+     'R':		Print a scalar Integer/FP/SIMD register name + 1.
      'X':		Print bottom 16 bits of integer constant in hex.
      'w/x':		Print a general register name or the zero register
 			(32-bit or 64-bit).
@@ -8623,12 +8623,13 @@  aarch64_print_operand (FILE *f, rtx x, int code)
       break;
 
     case 'R':
-      if (!REG_P (x) || !FP_REGNUM_P (REGNO (x)))
-	{
-	  output_operand_lossage ("incompatible floating point / vector register operand for '%%%c'", code);
-	  return;
-	}
-      asm_fprintf (f, "q%d", REGNO (x) - V0_REGNUM + 1);
+      if (REG_P (x) && FP_REGNUM_P (REGNO (x)))
+	asm_fprintf (f, "q%d", REGNO (x) - V0_REGNUM + 1);
+      else if (REG_P (x) && GP_REGNUM_P (REGNO (x)))
+	asm_fprintf (f, "x%d", REGNO (x) - R0_REGNUM + 1);
+      else
+	output_operand_lossage ("incompatible register operand for '%%%c'",
+				code);
       break;
 
     case 'X':

[AArch64,v4,1/6] aarch64: Extend %R for integer registers

Commit Message

Patch