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[192.237.175.120]) by mx.google.com with ESMTPS id e26si12515999iol.53.2019.10.02.11.02.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 Oct 2019 11:02:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iFivr-0005Hc-L0; Wed, 02 Oct 2019 18:00:59 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iFivq-0005HQ-4x for xen-devel@lists.xenproject.org; Wed, 02 Oct 2019 18:00:58 +0000 X-Inumbo-ID: 93b0929d-e53e-11e9-971c-12813bfff9fa Received: from foss.arm.com (unknown [217.140.110.172]) by localhost (Halon) with ESMTP id 93b0929d-e53e-11e9-971c-12813bfff9fa; Wed, 02 Oct 2019 18:00:54 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4A25F15A1; Wed, 2 Oct 2019 11:00:54 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 613563F706; Wed, 2 Oct 2019 11:00:53 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 2 Oct 2019 19:00:43 +0100 Message-Id: <20191002180047.17144-3-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20191002180047.17144-1-julien.grall@arm.com> References: <20191002180047.17144-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH for-4.13 2/6] xen/arm64: bitops: Match the register size with the value size in flsl X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Artem_Mygaiev@epam.com, Volodymyr Babchuk , Julien Grall , Stefano Stabellini , Julien Grall MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Clang is pickier than GCC for the register size in asm statement. It expects the register size to match the value size. The instruction clz is expecting the two operands to be the same size (i.e 32-bit or 64-bit). As the flsl function is dealing with 64-bit value, we need to make the destination variable 64-bit as well. While at it, add a newline before the return statement. Note that the return type of flsl is not updated because the result will always be smaller than 64 and therefore fit in 32-bit. Signed-off-by: Julien Grall Acked-by: Stefano Stabellini --- Changes in v2: - Update the commit message to explain why the return type is not modified --- xen/include/asm-arm/arm64/bitops.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/include/asm-arm/arm64/bitops.h b/xen/include/asm-arm/arm64/bitops.h index 6cc224ad13..d85a49bca4 100644 --- a/xen/include/asm-arm/arm64/bitops.h +++ b/xen/include/asm-arm/arm64/bitops.h @@ -24,12 +24,13 @@ static /*__*/always_inline unsigned long __ffs(unsigned long word) static inline int flsl(unsigned long x) { - int ret; + uint64_t ret; if (__builtin_constant_p(x)) return generic_flsl(x); asm("clz\t%0, %1" : "=r" (ret) : "r" (x)); + return BITS_PER_LONG - ret; }