[1/4] arm64: cpufeature: Effectively expose FRINT capability to userspace

Message ID 20191003111211.483-2-julien.grall@arm.com
State Accepted
Commit 7230f7e99fecc684180322b056fad3853d1029d3
Headers show
Series
  • arm64/cpufeature: Fix + doc update
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Commit Message

Julien Grall Oct. 3, 2019, 11:12 a.m.
The HWCAP framework will detect a new capability based on the sanitized
version of the ID registers.

Sanitization is based on a whitelist, so any field not described will end
up to be zeroed.

At the moment, ID_AA64ISAR1_EL1.FRINTTS is not described in
ftr_id_aa64isar1. This means the field will be zeroed and therefore the
userspace will not be able to see the HWCAP even if the hardware
supports the feature.

This can be fixed by describing the field in ftr_id_aa64isar1.

Fixes: ca9503fc9e98 ("arm64: Expose FRINT capabilities to userspace")
Signed-off-by: Julien Grall <julien.grall@arm.com>

Cc: mark.brown@arm.com
---
 arch/arm64/kernel/cpufeature.c | 1 +
 1 file changed, 1 insertion(+)

-- 
2.11.0

Comments

Will Deacon Oct. 4, 2019, 10:36 a.m. | #1
On Thu, Oct 03, 2019 at 12:12:08PM +0100, Julien Grall wrote:
> The HWCAP framework will detect a new capability based on the sanitized

> version of the ID registers.

> 

> Sanitization is based on a whitelist, so any field not described will end

> up to be zeroed.

> 

> At the moment, ID_AA64ISAR1_EL1.FRINTTS is not described in

> ftr_id_aa64isar1. This means the field will be zeroed and therefore the

> userspace will not be able to see the HWCAP even if the hardware

> supports the feature.

> 

> This can be fixed by describing the field in ftr_id_aa64isar1.

> 

> Fixes: ca9503fc9e98 ("arm64: Expose FRINT capabilities to userspace")

> Signed-off-by: Julien Grall <julien.grall@arm.com>

> Cc: mark.brown@arm.com

> ---

>  arch/arm64/kernel/cpufeature.c | 1 +

>  1 file changed, 1 insertion(+)


D'oh, we should've caught this in testing. Queued as a fix.

Will

Patch

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 9323bcc40a58..cabebf1a7976 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -136,6 +136,7 @@  static const struct arm64_ftr_bits ftr_id_aa64isar0[] = {
 
 static const struct arm64_ftr_bits ftr_id_aa64isar1[] = {
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_SB_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_FRINTTS_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_GPI_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),