[1/8] hw/timer/puv3_ost.c: Switch to transaction-based ptimer API

Message ID 20191017132905.5604-2-peter.maydell@linaro.org
State Superseded
Headers show
Series
  • Convert misc-arch devices to new ptimer API
Related show

Commit Message

Peter Maydell Oct. 17, 2019, 1:28 p.m.
Switch the puv3_ost code away from bottom-half based ptimers to the
new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 hw/timer/puv3_ost.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

-- 
2.20.1

Comments

Richard Henderson Oct. 17, 2019, 2:26 p.m. | #1
On 10/17/19 6:28 AM, Peter Maydell wrote:
> Switch the puv3_ost code away from bottom-half based ptimers to the

> new transaction-based ptimer API.  This just requires adding

> begin/commit calls around the various places that modify the ptimer

> state, and using the new ptimer_init() function to create the timer.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

> ---

>  hw/timer/puv3_ost.c | 9 +++++----

>  1 file changed, 5 insertions(+), 4 deletions(-)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>



r~
Philippe Mathieu-Daudé Oct. 17, 2019, 3:59 p.m. | #2
On 10/17/19 3:28 PM, Peter Maydell wrote:
> Switch the puv3_ost code away from bottom-half based ptimers to the

> new transaction-based ptimer API.  This just requires adding

> begin/commit calls around the various places that modify the ptimer

> state, and using the new ptimer_init() function to create the timer.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

> ---

>   hw/timer/puv3_ost.c | 9 +++++----

>   1 file changed, 5 insertions(+), 4 deletions(-)

> 

> diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c

> index 0898da5ce97..697519593bb 100644

> --- a/hw/timer/puv3_ost.c

> +++ b/hw/timer/puv3_ost.c

> @@ -13,7 +13,6 @@

>   #include "hw/sysbus.h"

>   #include "hw/irq.h"

>   #include "hw/ptimer.h"

> -#include "qemu/main-loop.h"

>   #include "qemu/module.h"

>   

>   #undef DEBUG_PUV3

> @@ -27,7 +26,6 @@ typedef struct PUV3OSTState {

>       SysBusDevice parent_obj;

>   

>       MemoryRegion iomem;

> -    QEMUBH *bh;

>       qemu_irq irq;

>       ptimer_state *ptimer;

>   

> @@ -68,6 +66,7 @@ static void puv3_ost_write(void *opaque, hwaddr offset,

>       DPRINTF("offset 0x%x, value 0x%x\n", offset, value);

>       switch (offset) {

>       case 0x00: /* Match Register 0 */

> +        ptimer_transaction_begin(s->ptimer);

>           s->reg_OSMR0 = value;

>           if (s->reg_OSMR0 > s->reg_OSCR) {

>               ptimer_set_count(s->ptimer, s->reg_OSMR0 - s->reg_OSCR);

> @@ -76,6 +75,7 @@ static void puv3_ost_write(void *opaque, hwaddr offset,

>                       (0xffffffff - s->reg_OSCR));

>           }

>           ptimer_run(s->ptimer, 2);

> +        ptimer_transaction_commit(s->ptimer);

>           break;

>       case 0x14: /* Status Register */

>           assert(value == 0);

> @@ -128,9 +128,10 @@ static void puv3_ost_realize(DeviceState *dev, Error **errp)

>   

>       sysbus_init_irq(sbd, &s->irq);

>   

> -    s->bh = qemu_bh_new(puv3_ost_tick, s);

> -    s->ptimer = ptimer_init_with_bh(s->bh, PTIMER_POLICY_DEFAULT);

> +    s->ptimer = ptimer_init(puv3_ost_tick, s, PTIMER_POLICY_DEFAULT);

> +    ptimer_transaction_begin(s->ptimer);

>       ptimer_set_freq(s->ptimer, 50 * 1000 * 1000);

> +    ptimer_transaction_commit(s->ptimer);

>   

>       memory_region_init_io(&s->iomem, OBJECT(s), &puv3_ost_ops, s, "puv3_ost",

>               PUV3_REGS_OFFSET);

> 


Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Patch

diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c
index 0898da5ce97..697519593bb 100644
--- a/hw/timer/puv3_ost.c
+++ b/hw/timer/puv3_ost.c
@@ -13,7 +13,6 @@ 
 #include "hw/sysbus.h"
 #include "hw/irq.h"
 #include "hw/ptimer.h"
-#include "qemu/main-loop.h"
 #include "qemu/module.h"
 
 #undef DEBUG_PUV3
@@ -27,7 +26,6 @@  typedef struct PUV3OSTState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
-    QEMUBH *bh;
     qemu_irq irq;
     ptimer_state *ptimer;
 
@@ -68,6 +66,7 @@  static void puv3_ost_write(void *opaque, hwaddr offset,
     DPRINTF("offset 0x%x, value 0x%x\n", offset, value);
     switch (offset) {
     case 0x00: /* Match Register 0 */
+        ptimer_transaction_begin(s->ptimer);
         s->reg_OSMR0 = value;
         if (s->reg_OSMR0 > s->reg_OSCR) {
             ptimer_set_count(s->ptimer, s->reg_OSMR0 - s->reg_OSCR);
@@ -76,6 +75,7 @@  static void puv3_ost_write(void *opaque, hwaddr offset,
                     (0xffffffff - s->reg_OSCR));
         }
         ptimer_run(s->ptimer, 2);
+        ptimer_transaction_commit(s->ptimer);
         break;
     case 0x14: /* Status Register */
         assert(value == 0);
@@ -128,9 +128,10 @@  static void puv3_ost_realize(DeviceState *dev, Error **errp)
 
     sysbus_init_irq(sbd, &s->irq);
 
-    s->bh = qemu_bh_new(puv3_ost_tick, s);
-    s->ptimer = ptimer_init_with_bh(s->bh, PTIMER_POLICY_DEFAULT);
+    s->ptimer = ptimer_init(puv3_ost_tick, s, PTIMER_POLICY_DEFAULT);
+    ptimer_transaction_begin(s->ptimer);
     ptimer_set_freq(s->ptimer, 50 * 1000 * 1000);
+    ptimer_transaction_commit(s->ptimer);
 
     memory_region_init_io(&s->iomem, OBJECT(s), &puv3_ost_ops, s, "puv3_ost",
             PUV3_REGS_OFFSET);