From patchwork Fri Jun 7 10:56:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tushar Behera X-Patchwork-Id: 17670 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-bk0-f71.google.com (mail-bk0-f71.google.com [209.85.214.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 79BF025E1F for ; Fri, 7 Jun 2013 11:10:49 +0000 (UTC) Received: by mail-bk0-f71.google.com with SMTP id ik8sf624497bkc.6 for ; Fri, 07 Jun 2013 04:10:48 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:x-beenthere:x-forwarded-to:x-forwarded-for :delivered-to:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-google-group-id:list-post:list-help:list-archive:list-unsubscribe; bh=dzWh9JfT0jrJm7zWOuimQ/hY+oY+iQsFhTBM85n5QdM=; b=cixTcGH5fyI206fjiEhbYlZvaL/XjEgxP5Uokuq/9X1v5mkG8z1ETrgnCmbkXkjK5L o+PkCzRMjsRk//HRUtQTf9blW5FRqquoM6zNMeBF7D8AGWIUQPxMGdTOB/kcw1pd/qIh SRn7VWpsFJ+AjWrrdps3CtsPoRLt1xc8gZHoxOKmwJsnplaBWLL9nV68TahAjENYfJqp /hCnKKBrgesP2SQKD1MiwfPjNSBquTYwx3i59pysOh4gSwMQdwmHIYUOhqVa3kprPR2X tyjhJJLSn5ZIK6azdH3kUMAongTP/vJMJ+v48zzImRy+DjY7kBVeKw6pkRfCTJZAAOwz QAWg== X-Received: by 10.180.76.76 with SMTP id i12mr1035530wiw.6.1370603448475; Fri, 07 Jun 2013 04:10:48 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.180.83.6 with SMTP id m6ls164651wiy.23.canary; Fri, 07 Jun 2013 04:10:48 -0700 (PDT) X-Received: by 10.194.237.133 with SMTP id vc5mr35225307wjc.37.1370603448379; Fri, 07 Jun 2013 04:10:48 -0700 (PDT) Received: from mail-ve0-x22f.google.com (mail-ve0-x22f.google.com [2607:f8b0:400c:c01::22f]) by mx.google.com with ESMTPS id z7si9390719wiy.27.2013.06.07.04.10.48 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 07 Jun 2013 04:10:48 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400c:c01::22f is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=2607:f8b0:400c:c01::22f; Received: by mail-ve0-f175.google.com with SMTP id da11so2952367veb.34 for ; Fri, 07 Jun 2013 04:10:47 -0700 (PDT) X-Received: by 10.58.144.231 with SMTP id sp7mr2301096veb.34.1370603447302; Fri, 07 Jun 2013 04:10:47 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.221.10.206 with SMTP id pb14csp109607vcb; Fri, 7 Jun 2013 04:10:46 -0700 (PDT) X-Received: by 10.68.208.39 with SMTP id mb7mr44248043pbc.84.1370603446310; Fri, 07 Jun 2013 04:10:46 -0700 (PDT) Received: from mail-pa0-x236.google.com (mail-pa0-x236.google.com [2607:f8b0:400e:c03::236]) by mx.google.com with ESMTPS id yh2si1304907pab.148.2013.06.07.04.10.46 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 07 Jun 2013 04:10:46 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400e:c03::236 is neither permitted nor denied by best guess record for domain of tushar.behera@linaro.org) client-ip=2607:f8b0:400e:c03::236; Received: by mail-pa0-f54.google.com with SMTP id kx10so192114pab.13 for ; Fri, 07 Jun 2013 04:10:46 -0700 (PDT) X-Received: by 10.66.254.131 with SMTP id ai3mr2248834pad.54.1370603445931; Fri, 07 Jun 2013 04:10:45 -0700 (PDT) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id vv6sm2701272pab.6.2013.06.07.04.10.42 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 07 Jun 2013 04:10:45 -0700 (PDT) From: Tushar Behera To: u-boot@lists.denx.de Cc: mk7.kang@samsung.com, k.chander@samsung.com, patches@linaro.org Subject: [PATCH] Origen: Set FIMD as the default display path Date: Fri, 7 Jun 2013 16:26:22 +0530 Message-Id: <1370602582-6332-2-git-send-email-tushar.behera@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1370602582-6332-1-git-send-email-tushar.behera@linaro.org> References: <1370602582-6332-1-git-send-email-tushar.behera@linaro.org> X-Gm-Message-State: ALoCoQl9NVjw0BNYrjBzQKryF1pkTSE81CjeDB9Z9QVaQIhASPWXrAvdRls1o2r3GSa3EcbQZcNd X-Original-Sender: tushar.behera@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c01::22f is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , On EXYNOS4210, there are three paths for display data to be processed, namely MIE, MDNIE and FIMD. On Origen board, FIMD display controller is used. Signed-off-by: Tushar Behera --- This patch is rebased on master branch of u-boot-samsung tree. board/samsung/origen/lowlevel_init.S | 13 +++++++++++++ board/samsung/origen/origen_setup.h | 7 +++++++ 2 files changed, 20 insertions(+) diff --git a/board/samsung/origen/lowlevel_init.S b/board/samsung/origen/lowlevel_init.S index be9d418..a7ea680 100644 --- a/board/samsung/origen/lowlevel_init.S +++ b/board/samsung/origen/lowlevel_init.S @@ -89,6 +89,7 @@ lowlevel_init: bl uart_asm_init bl arch_cpu_init bl tzpc_init + bl display_init pop {pc} wakeup_reset: @@ -96,6 +97,7 @@ wakeup_reset: bl mem_ctrl_asm_init bl arch_cpu_init bl tzpc_init + bl display_init exit_wakeup: /* Load return address and jump to kernel */ @@ -355,3 +357,14 @@ uart_asm_init: nop nop +/* Setting default display path to FIMD */ +display_init: + push {lr} + ldr r0, =EXYNOS4_SYSREG_BASE + + /* DISPLAY_CONTROL */ + ldr r1, =DISPLAY_CONTROL_VAL + ldr r2, =DISPLAY_CONTROL_OFFSET + str r1, [r0, r2] + + pop {pc} diff --git a/board/samsung/origen/origen_setup.h b/board/samsung/origen/origen_setup.h index 926a4cc..b0e1bc2 100644 --- a/board/samsung/origen/origen_setup.h +++ b/board/samsung/origen/origen_setup.h @@ -83,6 +83,8 @@ #define VPLL_CON0_OFFSET 0xC120 #define VPLL_CON1_OFFSET 0xC124 +#define DISPLAY_CONTROL_OFFSET 0x210 + /* DMC: DRAM Controllor Register offsets */ #define DMC_CONCONTROL 0x00 #define DMC_MEMCONTROL 0x04 @@ -485,6 +487,11 @@ | (VPLL_MRR << 24) \ | (VPLL_MFR << 16) \ | (VPLL_K << 0)) + +/* DISPLAY_CONTROL */ +#define FIMDBYPASS_LBLK0 0x1 +#define DISPLAY_CONTROL_VAL (FIMDBYPASS_LBLK0 << 1) + /* * UART GPIO_A0/GPIO_A1 Control Register Value * 0x2: UART Function