Message ID | 20191023125735.4713-9-kishon@ti.com |
---|---|
State | Superseded |
Headers | show |
Series | PHY: Add support for SERDES in TI's J721E SoC | expand |
diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index b555d4c3633b..2648a01f90b3 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -497,7 +497,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) struct phy *gphy; sp->phys[node].lnk_rst = - of_reset_control_get_exclusive_by_index(child, 0); + of_reset_control_array_get_exclusive(child); if (IS_ERR(sp->phys[node].lnk_rst)) { dev_err(dev, "failed to get reset %s\n",
A link may have multiple lanes each with a separate reset. Get reset control "array" in order to reset all the lanes associated with the link. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- drivers/phy/cadence/phy-cadence-sierra.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1