From patchwork Thu Oct 24 12:47:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 177432 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2142079ill; Thu, 24 Oct 2019 05:49:08 -0700 (PDT) X-Google-Smtp-Source: APXvYqyYvFV0Z5MBwmemVQLb6KRsNaxzUMv707i+GWDVPNruVtvQA6/PV9ifzD7XW3IvYje319id X-Received: by 2002:aa7:c587:: with SMTP id g7mr43231225edq.151.1571921348009; Thu, 24 Oct 2019 05:49:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571921348; cv=none; d=google.com; s=arc-20160816; b=c6IK0uaeX7qLfuLiqbFTtAM+O1WOuy4EsGebcCWc1oBmb1fpzqZo1EOu679N/i/D7s G28uM3Ec0+CNgEZAfB9VhzqcJ1FWUOB4FYho9yAqFYQomvQwEbzV+KpcA873JvcZ9Sbu 3So61mmt9v51vQsJdCncMu1hVHWKmhn+jxJBdiGJsaUt9HaGpGqQ5KOdk6UKRPJAhKau JLNtmnPEEGYyCMuixTSBgxZBL3Re8ntDBXHPVGXN7G9rU22Tg3CUPQ9dQdVwjy3plRYr /WHq3oMJkKzGISU+UM45tALVJFyKH0/0ahOzAuTkhxRrMZhD5kgtYborG4ZaU8wk107X qTQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=uHLOvPlG3n0zrZ1s6GpObuHrC2FtNjmc/6afOucoSvg=; b=dNKWOujV5Fxjxs0iDeKFbDdjsAmS8G2Pk1/v6Ew0nQzVWUdOwMzVvcc/fgaHKm+bJb n1UsiBWqWE0XCxMhyMQhfYgU7lBNePKF5ob4jXeIqJ3+6pmpPVsc+P2kbne4W1/0Md9s 62w8jvgQ6wjcmGF+fngLQezfP1i0yH2Xbgi4qgyKBTAcNbO6fxnOiqXd59d//RidoLab kwqABBH6nqrhXX7wAB3Ya8cBb44PnNdyDWAWjeoGB98iU8feZtYZYWddb0sWb4ovffIi tWXhqPAvYDwRdFLvXawSmX71CX2BPxJQQzIthx4c6x9OiDzU3G2NW/STiiySs0BK9va6 WBAw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YKCyO53l; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f3si12973378eda.251.2019.10.24.05.49.07; Thu, 24 Oct 2019 05:49:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YKCyO53l; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729176AbfJXMtH (ORCPT + 14 others); Thu, 24 Oct 2019 08:49:07 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:46705 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728684AbfJXMtH (ORCPT ); Thu, 24 Oct 2019 08:49:07 -0400 Received: by mail-wr1-f66.google.com with SMTP id n15so15144140wrw.13 for ; Thu, 24 Oct 2019 05:49:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uHLOvPlG3n0zrZ1s6GpObuHrC2FtNjmc/6afOucoSvg=; b=YKCyO53lOOE6KHgouNsNJx8P9etdM3UBW3lOKk+36GW9Uzy57S5QOkoUOYRjmx2Ere QkO6xm3XLwOc/ZTYkiZvKJD77M8Qq0J4sRhaQGBXqBiodG8Rmyl1zvaUE+5KchdQ1am8 Y2jxwIJWe10qOxdQwpnxDgEXKwJPyAdoXTRN0i+bLSUGnNiomxZ5SvniOQea3OTlD43S p4xb4xmzCWHVEk4yXtxm9xVSB76f3Xurfq2OdHIUmvQF7KdING6Fi1YiKW/6+WEtCjvE eQBz0Y1jNfnYMfx3dGRFxXMxkz8Df4LrQZ31ASUPOyITD5Fk7Z3JGAHIXFbrCUqsVPMz pKmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uHLOvPlG3n0zrZ1s6GpObuHrC2FtNjmc/6afOucoSvg=; b=nMvm3eaq2ywC9gXp/FDjWY8wtLehVOu9Rj9UPX3wPUrpJO5zxHXk2qB7cusIn410xA akxwJX1NgXhf7Mas9x6XZw8NBEBPToYWfGB9Ud8c/zF7+52N3mUTJg5QWvOGec382e6o yxOkcxhxT3gp4jGYTu0saO4qHmMleknhlgxYpZktAa0jVSoRC1/Y4uPZUOww1m2AT+V6 dBCOlyKDXWeyoAIgi77s4Hgsd04wWKLIS7qHfR1IeIBKbcVulKPzFvTAwLv7M80kfwVT FUfXWwmxdIqac8UrdYoFvjtc8LKzS0HpvwPvGTL9st+S4Wp0BHo6SwgRItojcgKBS5oy rbew== X-Gm-Message-State: APjAAAUg8cAOnMJdoKyXdeRtW+iTVHo8SJB0xIELRBpS/MoouV0tSy0S QdRioJRRFqacM0hRtTzlhLQYiZ7VdG6xwdyP X-Received: by 2002:a5d:52c4:: with SMTP id r4mr3556438wrv.168.1571921344572; Thu, 24 Oct 2019 05:49:04 -0700 (PDT) Received: from localhost.localdomain (aaubervilliers-681-1-126-126.w90-88.abo.wanadoo.fr. [90.88.7.126]) by smtp.gmail.com with ESMTPSA id j22sm29111038wrd.41.2019.10.24.05.49.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Oct 2019 05:49:03 -0700 (PDT) From: Ard Biesheuvel To: stable@vger.kernel.org Cc: Ard Biesheuvel , Will Deacon , Catalin Marinas , Marc Zyngier , Mark Rutland , Suzuki K Poulose , Jeremy Linton , Andre Przywara , Alexandru Elisei , Will Deacon , Dave Martin Subject: [PATCH for-stable-4.14 11/48] arm64: capabilities: Move errata work around check on boot CPU Date: Thu, 24 Oct 2019 14:47:56 +0200 Message-Id: <20191024124833.4158-12-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191024124833.4158-1-ard.biesheuvel@linaro.org> References: <20191024124833.4158-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Suzuki K Poulose [ Upstream commit 5e91107b06811f0ca147cebbedce53626c9c4443 ] We trigger CPU errata work around check on the boot CPU from smp_prepare_boot_cpu() to make sure that we run the checks only after the CPU feature infrastructure is initialised. While this is correct, we can also do this from init_cpu_features() which initilises the infrastructure, and is called only on the Boot CPU. This helps to consolidate the CPU capability handling to cpufeature.c. No functional changes. Cc: Will Deacon Cc: Catalin Marinas Cc: Mark Rutland Reviewed-by: Dave Martin Signed-off-by: Suzuki K Poulose Signed-off-by: Will Deacon Signed-off-by: Ard Biesheuvel --- arch/arm64/kernel/cpufeature.c | 5 +++++ arch/arm64/kernel/smp.c | 6 ------ 2 files changed, 5 insertions(+), 6 deletions(-) -- 2.20.1 diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 17aa34d70771..1269d496db0a 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -521,6 +521,11 @@ void __init init_cpu_features(struct cpuinfo_arm64 *info) init_cpu_ftr_reg(SYS_MVFR2_EL1, info->reg_mvfr2); } + /* + * Run the errata work around checks on the boot CPU, once we have + * initialised the cpu feature infrastructure. + */ + update_cpu_errata_workarounds(); } static void update_cpu_ftr_reg(struct arm64_ftr_reg *reg, u64 new) diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index b7ad41d7b6ee..e9b8395e24a7 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -449,12 +449,6 @@ void __init smp_prepare_boot_cpu(void) jump_label_init(); cpuinfo_store_boot_cpu(); save_boot_cpu_run_el(); - /* - * Run the errata work around checks on the boot CPU, once we have - * initialised the cpu feature infrastructure from - * cpuinfo_store_boot_cpu() above. - */ - update_cpu_errata_workarounds(); } static u64 __init of_get_cpu_mpidr(struct device_node *dn)