From patchwork Thu Oct 24 22:51:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sami Tolvanen X-Patchwork-Id: 177605 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2842632ill; Thu, 24 Oct 2019 15:51:59 -0700 (PDT) X-Google-Smtp-Source: APXvYqz2cFoPELxCmdjB6ILBIHNCiG4WZuyMAdglYAmLUZ/uP/JjUUwc6KJcHJ8KJFWs41pZd9Q7 X-Received: by 2002:a17:906:1655:: with SMTP id n21mr574399ejd.110.1571957519164; Thu, 24 Oct 2019 15:51:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571957519; cv=none; d=google.com; s=arc-20160816; b=bVFRRYfFPNzqNpQhd9V3sqccEpuL9rwus6tbzZkiyV6FkNtlQC/9+DFju4ftkQGfJx 1AVj8O9XjIHYgAFvnaelPBm+Bbv9qh0LVudsGGwkdD0Js3ZjQMFhT65xA/bs+GrRqzS9 snP3hxsAxNBC4BEsh3/nISy3O58Nwyet/56bFi4ThMOvZ9GLuH1Sr9bT4Wkt9OQp5iig rbvb8hI+q8Vw3fxzSjehlqcZlwjgZoAdLEwi5P4yratbhalBFUuLX/Teo6rXSyqreuDp w50EAj4UrAhGWVu5GOmlcwdHKbZAnBmBD7EcERSYjJ6gDfXDLCY419aOg1287Q6CuFll 9fGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:dkim-signature; bh=8uBb3Aen2dVYsBIXAkNtXm49lkX7BN4KRJO1G4p19Vk=; b=nElJsJDK23Jqhb/KJ4K/G2HlSp845mRacHuPuWBG6XGpNl6A5twagQlFxv6PLUi5zw 4DRLtBZEXR2dGW42pP3VSLlziyaLbMq2JkVNEps7YHmV+gDz3nTR04++1CKQR4qHUXa2 FVrNtJvLLHLk5Pk/ldnfq25/mqUBusKAnyb6N/9IjlnqvzqZU4cVQ0+Q0V13FZo5IZXw hrZXmDnZB7E3veYYp1KnBPX7if9Rh7dqmdEICA66zJf/5AMrqkk5RGZBr/QTSC2eW4CB JF8m6TXZIGiv4K8uBQV0zpgu9sJrfLoptmG/i8aA1AYEWDnN7f2w9L2BtooOTV9Ve0TB hToA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=W8RCJ99r; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h14si20629278edk.315.2019.10.24.15.51.58; Thu, 24 Oct 2019 15:51:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=W8RCJ99r; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732227AbfJXWvw (ORCPT + 26 others); Thu, 24 Oct 2019 18:51:52 -0400 Received: from mail-qk1-f202.google.com ([209.85.222.202]:38936 "EHLO mail-qk1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731988AbfJXWvv (ORCPT ); Thu, 24 Oct 2019 18:51:51 -0400 Received: by mail-qk1-f202.google.com with SMTP id s3so381251qkd.6 for ; Thu, 24 Oct 2019 15:51:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=8uBb3Aen2dVYsBIXAkNtXm49lkX7BN4KRJO1G4p19Vk=; b=W8RCJ99rqMNSxca++LAfzgn9Hg5nsdw/jcT/ymNLnIomChmMSfpKy/5K4o/1k/cope pvdfHAJKVdtQEPr2YqdFjda4aW3t79WTLfMMzcOvvEvdTD0U6EqtgfbfxYWZVO9sjiY+ zEnGfPJbe8LS/N7vf7ALrv6LHSVfoFuWhv+dbTHpfvLSDUZ/YLX4oFvgdgo0OnugGkrj JKW1QHjgeqgxAUA740iXA+/IxD/7imuI7v3wbag+0mF+zuCp6Z2P20cdm1A7O2WfTUdI +qfMO3ffD91g9GAotg+kdf7w1pgyq08sMv2uL337HBaayPhI0S+ZBH9XK9yfohm5gvtd xHPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=8uBb3Aen2dVYsBIXAkNtXm49lkX7BN4KRJO1G4p19Vk=; b=TEFJmOPtpOYApWghqIRM1adS/OtWkbTCyIb7u6SGVidW8OWBpQwgyGN1VY5jmi52hM kU5UrVBc6EMieCuh0ETLKL0ZLogvFFzxgK29HtQS34u5H+SzfNuNSpK+yKTIDtGfUyYA zeKCJCZmFGMz7X+7A0yFEzuzi9OZTIdDCio8021zGIJWz7cKJIOMuy6PCC5XhI76Hj+o KXuURgcw+koUbv/0PQlGjYFJJ93vozqpJPMjuNVeBFanTmyZIjrv4+xc6980t7qYZuzd Ow66ATeoRk+u56QE0QSMyD5cZ1yNV7vFI2LMxvW1WWRZA6zyeGx5DO09M7AaD20hNCOY gM8g== X-Gm-Message-State: APjAAAU0NsBO3oZX1eNCMCXo0Xw4M7ATVyijPBPThVOym/OvPKKefAlU vUqRnF9/iq2yiOTmcIDxb6rpds0BEg4dZtQsqEI= X-Received: by 2002:ae9:dec2:: with SMTP id s185mr127821qkf.283.1571957510607; Thu, 24 Oct 2019 15:51:50 -0700 (PDT) Date: Thu, 24 Oct 2019 15:51:19 -0700 In-Reply-To: <20191024225132.13410-1-samitolvanen@google.com> Message-Id: <20191024225132.13410-5-samitolvanen@google.com> Mime-Version: 1.0 References: <20191018161033.261971-1-samitolvanen@google.com> <20191024225132.13410-1-samitolvanen@google.com> X-Mailer: git-send-email 2.24.0.rc0.303.g954a862665-goog Subject: [PATCH v2 04/17] arm64: kernel: avoid x18 as an arbitrary temp register From: samitolvanen@google.com To: Will Deacon , Catalin Marinas , Steven Rostedt , Masami Hiramatsu , Ard Biesheuvel Cc: Dave Martin , Kees Cook , Laura Abbott , Mark Rutland , Nick Desaulniers , Jann Horn , Miguel Ojeda , Masahiro Yamada , clang-built-linux@googlegroups.com, kernel-hardening@lists.openwall.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sami Tolvanen Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ard Biesheuvel The code in __cpu_soft_restart() uses x18 as an arbitrary temp register, which will shortly be disallowed. So use x8 instead. Link: https://patchwork.kernel.org/patch/9836877/ Signed-off-by: Ard Biesheuvel Signed-off-by: Sami Tolvanen --- arch/arm64/kernel/cpu-reset.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.24.0.rc0.303.g954a862665-goog Reviewed-by: Mark Rutland diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S index 6ea337d464c4..32c7bf858dd9 100644 --- a/arch/arm64/kernel/cpu-reset.S +++ b/arch/arm64/kernel/cpu-reset.S @@ -42,11 +42,11 @@ ENTRY(__cpu_soft_restart) mov x0, #HVC_SOFT_RESTART hvc #0 // no return -1: mov x18, x1 // entry +1: mov x8, x1 // entry mov x0, x2 // arg0 mov x1, x3 // arg1 mov x2, x4 // arg2 - br x18 + br x8 ENDPROC(__cpu_soft_restart) .popsection