From patchwork Sun Oct 27 21:00:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 177881 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2552279ill; Sun, 27 Oct 2019 14:35:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqxhrrEeYsbUDvyN7c+NDz0WBDtax03v5nInNPCde3PAMQsJxRCgum9R3BqQRv3RDM892AxD X-Received: by 2002:aa7:db17:: with SMTP id t23mr16104610eds.135.1572212140840; Sun, 27 Oct 2019 14:35:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572212140; cv=none; d=google.com; s=arc-20160816; b=OTHCPklqZrpzwGWWyA7YtDSWS5EAIGpokvDSLdVOgfkixuPob8O8zpIIP2nL1DGdQR /NNcbAw3pfcKY3jdHoPqsuHfQTnRyRSxYesuwnWg9rye4sNwVIkOuFGaxZVmfWEk4FKT l+AB7cZfKsTpKE7ChWDJBomhGJklsFORGRQrk4AQhQXi+lxfjBL4PHg87VLPQ4DdH1sN R6TfMozI8EfSLD24OwkCMKtKOxRHzrIZ+KXMfDCQRxHi9f+564Ez2EkS0lIz91qr7ZZD Ww9vha7bcmccxSQKAC8VanofEo8hNGYXY+FACxbjsQAjpsjE/3zPlnFfrRgNq7i8uUHx y+xw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=E/d+FdwFTvwgEWG4ylsVjcvrRfOtui44Zrbxp710KCk=; b=vFlD94EMo3HbSnSo5XEgD2j/7ZRjzN2Ck0exuLXPvg2TL49WzNBqtDozJbrmw/q2yC a8zQ6Nk7HFF/eaBn0cuAqc3ulsO73WBLhFp3F/ThU/tqbfe9MsUeuBXCQ8lbBM0Ahbd6 9ksr2LLSSoH5U/W+RtFn4Ehb5yD6FI2zNvv8LNCuTqDKS2Zx+zE61rMhqEqF4BBk37SH 8jhIdWlxTtDYAAIldJiD5glgFXQcMIHRrqHbD0jnl+G66I6rYwHPnloXsKg4qixJ9Ird fQmFe/ttOcO3t1evXN8W6MNRVWZ3ChzoqS7oGWDQXx40TfrHcAwibMj6dMa3WxB+zaee yRrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=swR2oEST; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u1si5357353ejt.18.2019.10.27.14.35.40; Sun, 27 Oct 2019 14:35:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=swR2oEST; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728362AbfJ0Vfj (ORCPT + 14 others); Sun, 27 Oct 2019 17:35:39 -0400 Received: from mail.kernel.org ([198.145.29.99]:54894 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728766AbfJ0VIi (ORCPT ); Sun, 27 Oct 2019 17:08:38 -0400 Received: from localhost (100.50.158.77.rev.sfr.net [77.158.50.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8F75020B7C; Sun, 27 Oct 2019 21:08:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572210517; bh=MbJJGwCPobPXC73iVz1NPLAWQ5aGkr8Eo6NSbR550Mw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=swR2oESTSRZaWjW4oWfksFEOXt90FldNxoMnAeS1FxDV7wWrYdIwULPBzGNjfn5bB dobBu674tS9zrsOxg3Vt+7DLcEpr2C1Vk0QyQVLVKGPDO4K8i0YjtUvQswUvm1jMmE 9P9l+T3VgTMG7TEiMx2RMmHKbxxxRxQmdJuCXAIM= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Greg Kroah-Hartman , Catalin Marinas , Will Deacon , Mark Rutland , Dave Martin , Suzuki K Poulose , Ard Biesheuvel Subject: [PATCH 4.14 041/119] arm64: Documentation: cpu-feature-registers: Remove RES0 fields Date: Sun, 27 Oct 2019 22:00:18 +0100 Message-Id: <20191027203315.175774322@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191027203259.948006506@linuxfoundation.org> References: <20191027203259.948006506@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Suzuki K Poulose [ Upstream commit 847ecd3fa311cde0f10a1b66c572abb136742b1d ] Remove the invisible RES0 field entries from the table, listing fields in CPU ID feature registers, as : 1) We are only interested in the user visible fields. 2) The field description may not be up-to-date, as the field could be assigned a new meaning. 3) We already explain the rules of the fields which are not visible. Cc: Catalin Marinas Cc: Will Deacon Acked-by: Mark Rutland Reviewed-by: Dave Martin Signed-off-by: Suzuki K Poulose Signed-off-by: Will Deacon [ardb: fix up for missing SVE in context] Signed-off-by: Ard Biesheuvel Signed-off-by: Greg Kroah-Hartman --- Documentation/arm64/cpu-feature-registers.txt | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) --- a/Documentation/arm64/cpu-feature-registers.txt +++ b/Documentation/arm64/cpu-feature-registers.txt @@ -110,7 +110,6 @@ infrastructure: x--------------------------------------------------x | Name | bits | visible | |--------------------------------------------------| - | RES0 | [63-52] | n | |--------------------------------------------------| | FHM | [51-48] | y | |--------------------------------------------------| @@ -124,8 +123,6 @@ infrastructure: |--------------------------------------------------| | RDM | [31-28] | y | |--------------------------------------------------| - | RES0 | [27-24] | n | - |--------------------------------------------------| | ATOMICS | [23-20] | y | |--------------------------------------------------| | CRC32 | [19-16] | y | @@ -135,8 +132,6 @@ infrastructure: | SHA1 | [11-8] | y | |--------------------------------------------------| | AES | [7-4] | y | - |--------------------------------------------------| - | RES0 | [3-0] | n | x--------------------------------------------------x @@ -144,7 +139,8 @@ infrastructure: x--------------------------------------------------x | Name | bits | visible | |--------------------------------------------------| - | RES0 | [63-28] | n | + |--------------------------------------------------| + | SVE | [35-32] | y | |--------------------------------------------------| | GIC | [27-24] | n | |--------------------------------------------------|