From patchwork Fri Nov 8 12:35:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178901 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636649ilf; Fri, 8 Nov 2019 04:36:39 -0800 (PST) X-Google-Smtp-Source: APXvYqy6uv6x7VfyecaC5vFEDQtmlCnMfmy8MoXT2y7PRnQdCPMIZrIxgXbOlBiZv5ttStCQIS5h X-Received: by 2002:a17:906:48b:: with SMTP id f11mr8327644eja.225.1573216599094; Fri, 08 Nov 2019 04:36:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216599; cv=none; d=google.com; s=arc-20160816; b=RZ0RKnXU61TUShBowKEyJ1422xl5thNvnIkAjCiEVEAutOZXV1emJi3nSOBzH4hNo7 FeEVCo9w4Me7RAWuiKrooTZJbtOF3/NB+e7MdDus+PSCjlPy7NWwMlyGzoSDPMU6VZIJ /puPyL8m2cfIbrapJCqHJj6H0Xxuqae35WForqNs3klK/4wGgYEW/y5yTu2tbk33vaN6 cnUy7srBcDIraB9I4+Aa32+SzWRmDlW7GteZwZOjzkUS9Ch/8ZkPdB8B8pDkcAHuhZSo WqpjKqB+04pS6RGWRNPwwPHRkKpd/mZMz2rSkYMfHigX/MlM9nRpG0blIjn4rCs2tWEo 1ciQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=I8iOEZ1SS9cxaI1M3aArEO9NbvQhBBAOuzNIynOA7qs=; b=O8TQGJaaBWhhmTmIkKRwSYB749KKy/zySolnIAkxfc55zVfVng4HvBzR6+5WUgeRem zzgb/iTAz51IjyS22Ud3K/ImbNRF15VES74ULY9vNmU+CTBdaLbJYRJeCVnw89nq5aR5 4RQZDIO//n7SBqNRlBApUDQ+A1srVI7/Hmcinryqi2aJk6ZgCU0UkYTGhfoBM2HVPF2V JfB8tliNvP91/dIOskucGPcdn78uk1vzvUwKFlNuBB0X8NqlCJStkTpJS7f0v8gAl65T i0Bqzrhj3OhIqZY3jzPmSRUiKuGW2CHw99SB8JsAKMR0fWoL+tGzTSYwUHD+M7bvVuls st3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=krWsqwHy; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.38; Fri, 08 Nov 2019 04:36:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=krWsqwHy; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726979AbfKHMgi (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:38 -0500 Received: from mail.kernel.org ([198.145.29.99]:44170 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbfKHMgi (ORCPT ); Fri, 8 Nov 2019 07:36:38 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 003B9222CE; Fri, 8 Nov 2019 12:36:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216597; bh=lfqNguIX+MS46uPt+mN0qDZclrGzkeCxHG39i5vuD9E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=krWsqwHyo6DwWAFs7OvJ5/sUootB7W7uX9cXhbmaiqyt6g8HYLbGPxI1dyhDQ/RQJ QYPAj/XJ4Ek0UEkeW32I+WIbq4/FI2jkhrCoTqlswEz1bCRDT6WjlwDi2y3B9YbU6a feR4hWu3MDUAJlPldL8RaiFfYniHqD4hu6S2LF18= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Marc Zyngier , Ard Biesheuvel Subject: [PATCH for-stable-4.4 15/50] arm/arm64: smccc-1.1: Make return values unsigned long Date: Fri, 8 Nov 2019 13:35:19 +0100 Message-Id: <20191108123554.29004-16-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Marc Zyngier [ Upstream commit 1d8f574708a3fb6f18c85486d0c5217df893c0cf ] An unfortunate consequence of having a strong typing for the input values to the SMC call is that it also affects the type of the return values, limiting r0 to 32 bits and r{1,2,3} to whatever was passed as an input. Let's turn everything into "unsigned long", which satisfies the requirements of both architectures, and allows for the full range of return values. Reported-by: Julien Grall Signed-off-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ard Biesheuvel --- include/linux/arm-smccc.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) -- 2.20.1 diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index a4eec441f82d..9b340ff4fd7b 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -167,31 +167,31 @@ asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1, #define __declare_arg_0(a0, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ + register unsigned long r0 asm("r0") = (u32)a0; \ register unsigned long r1 asm("r1"); \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_1(a0, a1, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ + register unsigned long r0 asm("r0") = (u32)a0; \ + register unsigned long r1 asm("r1") = a1; \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_2(a0, a1, a2, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ - register typeof(a2) r2 asm("r2") = a2; \ + register unsigned long r0 asm("r0") = (u32)a0; \ + register unsigned long r1 asm("r1") = a1; \ + register unsigned long r2 asm("r2") = a2; \ register unsigned long r3 asm("r3") #define __declare_arg_3(a0, a1, a2, a3, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ - register typeof(a2) r2 asm("r2") = a2; \ - register typeof(a3) r3 asm("r3") = a3 + register unsigned long r0 asm("r0") = (u32)a0; \ + register unsigned long r1 asm("r1") = a1; \ + register unsigned long r2 asm("r2") = a2; \ + register unsigned long r3 asm("r3") = a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ __declare_arg_3(a0, a1, a2, a3, res); \