From patchwork Tue Nov 19 05:19:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 179707 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp171445ilf; Mon, 18 Nov 2019 21:52:59 -0800 (PST) X-Google-Smtp-Source: APXvYqwYvhHe58AuqQQN8AkGDhlSJetOhJkr+CffjpA+OD5y6gn0DdxxTtZUj2CokKfBnc5aO8DS X-Received: by 2002:a17:907:1102:: with SMTP id qu2mr32120947ejb.300.1574142779439; Mon, 18 Nov 2019 21:52:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574142779; cv=none; d=google.com; s=arc-20160816; b=o12WjFGe2DylzjUeY3GOwrz2gv71P40ddIScy+P5tqRTrl6LLVoxrmcOKO8+SGd2Az 5vduCC702tQOSKSTGdD/caENrvKbZlecO3ZRUE9G2bxcRiknmQ0TCM3DiombzyDpWNiT Yz5KlVPX1uTuVMrjoA771tPSj8+HvbhjrWNgiL6Ruj7Bj3FKEedVg4zUw4vzUHLOL9lT B3hZQygwZfHyVgChs0e5eNI87/JkC3E7ejAYR7NAedfLSkTqTO6I2i2XiDB73PPSuIfq tG2yq5EhwBEGggqte34wLqUiPQckjDXG0joLkvMF2LJaKM6NxtB/LjcE22ijQIHpMvgR 4y8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=tl/tiH9j2/QovkKmzZt6RsVyQePoBeHlLSFbGH28S5o=; b=nClMnGtiZ6wr3efLv57S2unZBzPE20mULyiNe0F+7Zkgq89Jw16w55gWBuJx6+0bLs NWO799LjMPM0eI9PzecwZ92sWti9CD+i0KWUbcer6YoEW2oba7Lw+UXNtubOfy7jgGW7 2avDSsAurYqB361nC0JdObVDkWEGYD3UXAhzuDvCQEHgzjBsbiBFteQdzYvQ+Yu6ZQ/x 4NeilUUJ9rlY3u1jBjL7uVE5uB5xQW+aJI5DxFHZmxkiexVuod7zGvBMv1LBfonJWUvU J0JV4SuflX8n4bZSe+H3Ysvs626YrUU/C50ec2FP5TbEpV2wzLigIPxQE7vkU1tqbiFK qfSg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=aniEgnHu; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c25si13499695eja.24.2019.11.18.21.52.59; Mon, 18 Nov 2019 21:52:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=aniEgnHu; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728493AbfKSFw5 (ORCPT + 15 others); Tue, 19 Nov 2019 00:52:57 -0500 Received: from mail.kernel.org ([198.145.29.99]:50754 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731961AbfKSFwy (ORCPT ); Tue, 19 Nov 2019 00:52:54 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5CE5221939; Tue, 19 Nov 2019 05:52:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1574142773; bh=oHMUJSdY6GTcK8AEGZQrARA28E+MfxcypOGkikh7IlM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aniEgnHukkFHqBb+ibfpEDoZKRrDoARwNv54Pae69dDQVpTp01+v2JxGRKMnuV930 lnxBeslCkow1u5hzgLX6WeisUbddg60bt2Paau/QFQ600fL+aHFlYbc5cwQ/v1OEI5 H6/86w0vGDHQLcTe9AC0ryNe5++xjYih+W4wv8Qo= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Mathieu Poirier , Mike Leach , Leo Yan , Sasha Levin Subject: [PATCH 4.14 195/239] coresight: tmc: Fix byte-address alignment for RRP Date: Tue, 19 Nov 2019 06:19:55 +0100 Message-Id: <20191119051335.964672784@linuxfoundation.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191119051255.850204959@linuxfoundation.org> References: <20191119051255.850204959@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Leo Yan [ Upstream commit e7753f3937610633a540f2be81be87531f96ff04 ] >From the comment in the code, it claims the requirement for byte-address alignment for RRP register: 'for 32-bit, 64-bit and 128-bit wide trace memory, the four LSBs must be 0s. For 256-bit wide trace memory, the five LSBs must be 0s'. This isn't consistent with the program, the program sets five LSBs as zeros for 32/64/128-bit wide trace memory and set six LSBs zeros for 256-bit wide trace memory. After checking with the CoreSight Trace Memory Controller technical reference manual (ARM DDI 0461B, section 3.3.4 RAM Read Pointer Register), it proves the comment is right and the program does wrong setting. This patch fixes byte-address alignment for RRP by following correct definition in the technical reference manual. Cc: Mathieu Poirier Cc: Mike Leach Signed-off-by: Leo Yan Signed-off-by: Mathieu Poirier Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sasha Levin --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.20.1 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index e2513b7862427..336194d059fed 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -442,10 +442,10 @@ static void tmc_update_etf_buffer(struct coresight_device *csdev, case TMC_MEM_INTF_WIDTH_32BITS: case TMC_MEM_INTF_WIDTH_64BITS: case TMC_MEM_INTF_WIDTH_128BITS: - mask = GENMASK(31, 5); + mask = GENMASK(31, 4); break; case TMC_MEM_INTF_WIDTH_256BITS: - mask = GENMASK(31, 6); + mask = GENMASK(31, 5); break; }