[3/3,v3] spi: fsl: Handle the single hardwired chipselect case

Message ID 20191128083718.39177-3-linus.walleij@linaro.org
State Accepted
Commit 7251953d784baf7e5416afabe030a0e81de1a938
Headers show
Series
  • [1/3,v3] spi: fsl: Fix GPIO descriptor support
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Commit Message

Linus Walleij Nov. 28, 2019, 8:37 a.m.
The Freescale MPC8xxx had a special quirk for handling a
single hardwired chipselect, the case when we're using neither
GPIO nor native chip select: when inspecting the device tree
and finding zero "cs-gpios" on the device node the code would
assume we have a single hardwired chipselect that leaves the
device always selected.

This quirk is not handled by the new core code, so we need
to check the "cs-gpios" explicitly in the driver and set
pdata->max_chipselect = 1 which will later fall through to
the SPI master ->num_chipselect.

Make sure not to assign the chip select handler in this
case: there is no handling needed since the chip is always
selected, and this is what the old code did as well.

Cc: Christophe Leroy <christophe.leroy@c-s.fr>
Reported-by: Christophe Leroy <christophe.leroy@c-s.fr>
Fixes: 0f0581b24bd0 ("spi: fsl: Convert to use CS GPIO descriptors")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

---
ChangeLog v2->v3:
- Resend with the other patches.
ChangeLog v1->v2:
- Reordered patches.
- Expanded comment a bit.
---
 drivers/spi/spi-fsl-spi.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

-- 
2.23.0

Comments

Christophe Leroy Nov. 28, 2019, 12:16 p.m. | #1
Le 28/11/2019 à 09:37, Linus Walleij a écrit :
> The Freescale MPC8xxx had a special quirk for handling a

> single hardwired chipselect, the case when we're using neither

> GPIO nor native chip select: when inspecting the device tree

> and finding zero "cs-gpios" on the device node the code would

> assume we have a single hardwired chipselect that leaves the

> device always selected.

> 

> This quirk is not handled by the new core code, so we need

> to check the "cs-gpios" explicitly in the driver and set

> pdata->max_chipselect = 1 which will later fall through to

> the SPI master ->num_chipselect.

> 

> Make sure not to assign the chip select handler in this

> case: there is no handling needed since the chip is always

> selected, and this is what the old code did as well.

> 

> Cc: Christophe Leroy <christophe.leroy@c-s.fr>

> Reported-by: Christophe Leroy <christophe.leroy@c-s.fr>

> Fixes: 0f0581b24bd0 ("spi: fsl: Convert to use CS GPIO descriptors")

> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>


Tested-by: Christophe Leroy <christophe.leroy@c-s.fr> (No tested the 

single hardwired chipselect case, only tested that this patch doesn't 
prevent the common case to work)


> ---

> ChangeLog v2->v3:

> - Resend with the other patches.

> ChangeLog v1->v2:

> - Reordered patches.

> - Expanded comment a bit.

> ---

>   drivers/spi/spi-fsl-spi.c | 14 ++++++++++++--

>   1 file changed, 12 insertions(+), 2 deletions(-)

> 

> diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c

> index c87e9c4506c2..4b70887cf443 100644

> --- a/drivers/spi/spi-fsl-spi.c

> +++ b/drivers/spi/spi-fsl-spi.c

> @@ -728,8 +728,18 @@ static int of_fsl_spi_probe(struct platform_device *ofdev)

>   			}

>   		}

>   #endif

> -

> -		pdata->cs_control = fsl_spi_cs_control;

> +		/*

> +		 * Handle the case where we have one hardwired (always selected)

> +		 * device on the first "chipselect". Else we let the core code

> +		 * handle any GPIOs or native chip selects and assign the

> +		 * appropriate callback for dealing with the CS lines. This isn't

> +		 * supported on the GRLIB variant.

> +		 */

> +		ret = gpiod_count(dev, "cs");

> +		if (ret <= 0)

> +			pdata->max_chipselect = 1;

> +		else

> +			pdata->cs_control = fsl_spi_cs_control;

>   	}

>   

>   	ret = of_address_to_resource(np, 0, &mem);

>

Patch

diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c
index c87e9c4506c2..4b70887cf443 100644
--- a/drivers/spi/spi-fsl-spi.c
+++ b/drivers/spi/spi-fsl-spi.c
@@ -728,8 +728,18 @@  static int of_fsl_spi_probe(struct platform_device *ofdev)
 			}
 		}
 #endif
-
-		pdata->cs_control = fsl_spi_cs_control;
+		/*
+		 * Handle the case where we have one hardwired (always selected)
+		 * device on the first "chipselect". Else we let the core code
+		 * handle any GPIOs or native chip selects and assign the
+		 * appropriate callback for dealing with the CS lines. This isn't
+		 * supported on the GRLIB variant.
+		 */
+		ret = gpiod_count(dev, "cs");
+		if (ret <= 0)
+			pdata->max_chipselect = 1;
+		else
+			pdata->cs_control = fsl_spi_cs_control;
 	}
 
 	ret = of_address_to_resource(np, 0, &mem);