From patchwork Mon Dec 2 10:29:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180578 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp5010155ile; Mon, 2 Dec 2019 02:29:25 -0800 (PST) X-Google-Smtp-Source: APXvYqw9ALiJmx8ZGj7jqPNWxPomoozFH4SEuH5Zeu8LSbE0YamYTogLK+xZJX0ORC+7kJzL5JuL X-Received: by 2002:a17:906:692:: with SMTP id u18mr23174952ejb.295.1575282565798; Mon, 02 Dec 2019 02:29:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575282565; cv=none; d=google.com; s=arc-20160816; b=NmINTa1Y0YXmV9kwma5L5C0rOTkx3F0/uJjeHd7uWCL1+fBF/4qJS8XH3brPcqkH7q PuoVjWGSSOiPGByoVwUzpIjbqS8wmpgAlq8mvFNjArgEqE5g6s0xhXJEo6sp/ki2xeS0 sy1PlLCasTBhtXGZkHcGNdJa51+RSIXC9asmHkElFC+xRz8xWzik0R6hiQW/glHSNIW9 maPpL4Bu7ITap3eYZ+9Za7FmcW1SLY5fQmhlK9qUJZWFDtH+G8TpshJWXVj1nwEU1vmV Mc3ZUJ53Xq9/v/JE5+vWKiDzOLnE5cKSQeYYdc9x8VzDsU3vloKMbj5GjuQfZTsBbBpk 4A8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=AS8DCYJJtvcNwN5um3nfXr6AdvFpDMDLb3Ox1ZQkkeA=; b=ihiQyFN49ULLJsqJEQPPkdUE4AUjfkF9+gvdggh47smvaeUE0v/udOnsPCspHaJFqR IDmWKnGDvpSwWnx3R9GT5Ca7jzBqPdn7rR2a+jJSvRT476Ol3i/bDfAxs0nX7ziBYaI/ iIt4IJdtXhkiqh/FsenzYVQrcXAQXrmhmf3PzDiqF7w/O5M3mEdQfdVWdX1Hy3bSl2lZ 2wJMy/A/aYl8XUzZksM/0gtWp9VToIEH731mtwT5pr5tX3tWtAhd/1o5a7qbvyNFRqk6 asWPBftQJA9TLDOEIly/liFKOVepuXaP8Rh7xSOnU0fUPH1bYnxODc5m5MAUdqWFHxu8 Qdsw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g2si3519668ejf.191.2019.12.02.02.29.25; Mon, 02 Dec 2019 02:29:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727445AbfLBK3X (ORCPT + 8 others); Mon, 2 Dec 2019 05:29:23 -0500 Received: from mx2.suse.de ([195.135.220.15]:57480 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726557AbfLBK3V (ORCPT ); Mon, 2 Dec 2019 05:29:21 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 1A41AB259; Mon, 2 Dec 2019 10:29:19 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 1/9] arm64: dts: realtek: rtd129x: Fix GIC CPU masks for RTD1293 Date: Mon, 2 Dec 2019 11:29:02 +0100 Message-Id: <20191202102910.26916-2-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191202102910.26916-1-afaerber@suse.de> References: <20191202102910.26916-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert from GIC_CPU_MASK_RAW() to GIC_CPU_MASK_SIMPLE(). In case of RTD1293 adjust the arch timer and VGIC interrupts' CPU masks to its smaller number of CPUs. Fixes: cf976f660ee8 ("arm64: dts: realtek: Add RTD1293 and Synology DS418j") Signed-off-by: Andreas Färber --- v1 -> v2: Unchanged arch/arm64/boot/dts/realtek/rtd1293.dtsi | 12 ++++++++---- arch/arm64/boot/dts/realtek/rtd1295.dtsi | 8 ++++---- arch/arm64/boot/dts/realtek/rtd1296.dtsi | 8 ++++---- 3 files changed, 16 insertions(+), 12 deletions(-) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd1293.dtsi b/arch/arm64/boot/dts/realtek/rtd1293.dtsi index bd4e22723f7b..2d92b56ac94d 100644 --- a/arch/arm64/boot/dts/realtek/rtd1293.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1293.dtsi @@ -36,16 +36,20 @@ timer { compatible = "arm,armv8-timer"; interrupts = , + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, ; + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; }; }; &arm_pmu { interrupt-affinity = <&cpu0>, <&cpu1>; }; + +&gic { + interrupts = ; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index 93f0e1d97721..34f6cc6f16fe 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -61,13 +61,13 @@ timer { compatible = "arm,armv8-timer"; interrupts = , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, ; + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; }; diff --git a/arch/arm64/boot/dts/realtek/rtd1296.dtsi b/arch/arm64/boot/dts/realtek/rtd1296.dtsi index 0f9e59cac086..fb864a139c97 100644 --- a/arch/arm64/boot/dts/realtek/rtd1296.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1296.dtsi @@ -50,13 +50,13 @@ timer { compatible = "arm,armv8-timer"; interrupts = , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, , + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, ; + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; };