diff mbox series

[01/14] ARM: dts: rtd1195: Introduce iso and misc syscon

Message ID 20191202182205.14629-2-afaerber@suse.de
State Accepted
Commit c5021279aa71f188780741afb9b50206918d7df9
Headers show
Series ARM: dts: realtek: Introduce syscon | expand

Commit Message

Andreas Färber Dec. 2, 2019, 6:21 p.m. UTC 
Group watchdog and UART0 into an Isolation syscon mfd node.
Group UART1 into a Miscellaneous syscon mfd node.

Cc: James Tai <james.tai@realtek.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>

---
 arch/arm/boot/dts/rtd1195.dtsi | 58 +++++++++++++++++++++++++++++-------------
 1 file changed, 40 insertions(+), 18 deletions(-)

-- 
2.16.4
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index a8f7b9caacba..a74f530dc439 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -100,28 +100,22 @@ 
 			#size-cells = <1>;
 			ranges = <0x0 0x18000000 0x70000>;
 
-			wdt: watchdog@7680 {
-				compatible = "realtek,rtd1295-watchdog";
-				reg = <0x7680 0x100>;
-				clocks = <&osc27M>;
-			};
-
-			uart0: serial@7800 {
-				compatible = "snps,dw-apb-uart";
-				reg = <0x7800 0x400>;
-				reg-shift = <2>;
+			iso: syscon@7000 {
+				compatible = "syscon", "simple-mfd";
+				reg = <0x7000 0x1000>;
 				reg-io-width = <4>;
-				clock-frequency = <27000000>;
-				status = "disabled";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0x0 0x7000 0x1000>;
 			};
 
-			uart1: serial@1b200 {
-				compatible = "snps,dw-apb-uart";
-				reg = <0x1b200 0x100>;
-				reg-shift = <2>;
+			misc: syscon@1b000 {
+				compatible = "syscon", "simple-mfd";
+				reg = <0x1b000 0x1000>;
 				reg-io-width = <4>;
-				clock-frequency = <27000000>;
-				status = "disabled";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0x0 0x1b000 0x1000>;
 			};
 		};
 
@@ -137,3 +131,31 @@ 
 		};
 	};
 };
+
+&iso {
+	wdt: watchdog@680 {
+		compatible = "realtek,rtd1295-watchdog";
+		reg = <0x680 0x100>;
+		clocks = <&osc27M>;
+	};
+
+	uart0: serial@800 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0x800 0x400>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <27000000>;
+		status = "disabled";
+	};
+};
+
+&misc {
+	uart1: serial@200 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0x200 0x100>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <27000000>;
+		status = "disabled";
+	};
+};