From patchwork Fri Dec 6 22:13:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sami Tolvanen X-Patchwork-Id: 180939 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp1378406ile; Fri, 6 Dec 2019 14:14:48 -0800 (PST) X-Google-Smtp-Source: APXvYqxGNFZpfvNiVukiRkaoFcashEWbsnQfi0OxgV+B8cf60TyVU9fud5oUEz/Mp+GV5q2bcSw0 X-Received: by 2002:a9d:7c97:: with SMTP id q23mr12768882otn.253.1575670488143; Fri, 06 Dec 2019 14:14:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575670488; cv=none; d=google.com; s=arc-20160816; b=UEeTCiGk3qk6nkqD8SrTJFobCYPkUDMmWEz4LQ+6f7asvvuoQBiWbmwatmXA0tICsL B3eIllGdUOQDVv0+3yNo0d3iIeaJDs3PR9DFBXN1gg1YLElelSTFb0vVJAEJ4h7Jw1Dv RoiFWBDZGBwvUDCDXOerRlIzO/R1UwG/KnoBka4cwe1RfwG5vvEwnIcR2rLmC0BPyOEz 9vCoFtqzl7UA5IGFMCcZsvSZ65bIkoohgKy7zA4Gxx7ziObFhYXAHzJ0umw6jXONWr3R AmN01IgQGOnRYrCANc0jXZIRumG7NmYRCjKpm4v7LFwvF6pA/CHxBTgCbcqgV2Qgq3Dh imDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:from:subject:references :mime-version:message-id:in-reply-to:date:dkim-signature; bh=XVGcsXtiiPVE9a9TFllXGgGHEKcXDxSx20NO6hJScDc=; b=sXH/oEumq9AiW9VFFCoOQN0rw5X3ocIlhg62dC+pE7xYptQNVJfsj+mxEBU4ep746j q8auM42WSpbK3/jO8WU0kpyvqd2NIsgpccoqBfSozvhh8ZL3nqkUN2tBRyF4noWcTqef 1zjKgYNRrfsbxNOuwkMMfuYZ9o3D3OtBrqtY4YBETVyf9JzozL+UDADp2OSTBWrMk3pa 7o08ENiIZShrKpXQSX2TwHIyr1lBM57B8ZlPuXJEW9+XjbveQGWhr1m9JmNV38RQERlw AfDKI1c2psrOcayyr3UoxjIPQQFJTTYngNqRIHegGy4eWT8VhyRTy65kgn0QzoGOHAix OSAw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b="JUnATL/q"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b133si3905140oif.244.2019.12.06.14.14.47; Fri, 06 Dec 2019 14:14:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b="JUnATL/q"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726598AbfLFWOK (ORCPT + 27 others); Fri, 6 Dec 2019 17:14:10 -0500 Received: from mail-pg1-f201.google.com ([209.85.215.201]:38480 "EHLO mail-pg1-f201.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726552AbfLFWOH (ORCPT ); Fri, 6 Dec 2019 17:14:07 -0500 Received: by mail-pg1-f201.google.com with SMTP id l13so4558951pgt.5 for ; Fri, 06 Dec 2019 14:14:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=XVGcsXtiiPVE9a9TFllXGgGHEKcXDxSx20NO6hJScDc=; b=JUnATL/qYc1oxv8iBdTskfQzu3dUUjyggOYJEMcIQnnUL/Y0NRoC+SEMllJtcFOWiS N/ulKnmZgrhoasRLRMaSLDH6091pEOUYgXXuTdPJyA/+/zT+NjML18Xbk0q7JQJZlyWp 6rTkEVNH+fLD7+o9KvYuKvTopFNc6WKI4uib8O/Vx3iw4Shp3SUt/TKbmahphI0HKiU4 BPRPCXf6h87GZeFyHIHYFqSn3p3Rv69hjOpYO3XFPBCkg3Q3z4MrJ2EA56qijI8w4jiX NQZtE0UhN3gJbyVa0+qGFUMyTZbRuK6Bc5RytwdbEZTnrQcmzPqvaU68OoqewWa4Q8Up 87AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=XVGcsXtiiPVE9a9TFllXGgGHEKcXDxSx20NO6hJScDc=; b=T7qqYmA8vquPRJiAb8xbeIaqQaA1p/1Lw8OC4/Yj9CJunnuazlww/9kX9tytfknRzm KAZoZwQ/KQHs20awWTuyxZKRHbf/JN9Ov0I2hlmaW5NrdaNRCIrSl1H9S25KEo8pSK6D z/vnCI2UhxfNMPY5Xrq4abqKw2dfM+TX4OvwxZQpbcXixWYXnbycmQcdwEsfE0rSGLUM vZvbXGkw4BH5b1Szm3c3NdAayOXoIBo2+Et2xfKuvuPN9b0cvuM+xJ2frqxC8Z/voPpP 1SskbNfc8/WkJLaR+IX5BDd3htK9dX3PSGpYtBbI8a8Y17rorCYOkIu+lL6RDvxSyjmb Cy0A== X-Gm-Message-State: APjAAAWALJ9ALcZ94cyyiXx81o4jgRja+8w5bDRnIL1ktMHgho4B6XhI MzQnk/omO+Rc1QJL6vlDMsNxHAVa+R5+C/NekN0= X-Received: by 2002:a63:1c66:: with SMTP id c38mr5983922pgm.368.1575670446054; Fri, 06 Dec 2019 14:14:06 -0800 (PST) Date: Fri, 6 Dec 2019 14:13:40 -0800 In-Reply-To: <20191206221351.38241-1-samitolvanen@google.com> Message-Id: <20191206221351.38241-5-samitolvanen@google.com> Mime-Version: 1.0 References: <20191018161033.261971-1-samitolvanen@google.com> <20191206221351.38241-1-samitolvanen@google.com> X-Mailer: git-send-email 2.24.0.393.g34dc348eaf-goog Subject: [PATCH v6 04/15] arm64: kernel: avoid x18 in __cpu_soft_restart From: Sami Tolvanen To: Will Deacon , Catalin Marinas , Steven Rostedt , Masami Hiramatsu , Ard Biesheuvel , Mark Rutland Cc: Dave Martin , Kees Cook , Laura Abbott , Marc Zyngier , Nick Desaulniers , Jann Horn , Miguel Ojeda , Masahiro Yamada , clang-built-linux@googlegroups.com, kernel-hardening@lists.openwall.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sami Tolvanen Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ard Biesheuvel The code in __cpu_soft_restart() uses x18 as an arbitrary temp register, which will shortly be disallowed. So use x8 instead. Link: https://patchwork.kernel.org/patch/9836877/ Signed-off-by: Ard Biesheuvel [Sami: updated commit message] Signed-off-by: Sami Tolvanen Reviewed-by: Mark Rutland Reviewed-by: Kees Cook --- arch/arm64/kernel/cpu-reset.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.24.0.393.g34dc348eaf-goog diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S index 6ea337d464c4..32c7bf858dd9 100644 --- a/arch/arm64/kernel/cpu-reset.S +++ b/arch/arm64/kernel/cpu-reset.S @@ -42,11 +42,11 @@ ENTRY(__cpu_soft_restart) mov x0, #HVC_SOFT_RESTART hvc #0 // no return -1: mov x18, x1 // entry +1: mov x8, x1 // entry mov x0, x2 // arg0 mov x1, x3 // arg1 mov x2, x4 // arg2 - br x18 + br x8 ENDPROC(__cpu_soft_restart) .popsection