From patchwork Wed Dec 11 15:05:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 181225 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp659006ile; Wed, 11 Dec 2019 07:09:34 -0800 (PST) X-Google-Smtp-Source: APXvYqxWAgxa/L5jG91eClApEqO3HWarB+UAHuZ6AhIJKDW8tqor2Exhm66Dtf4QEy0ItrfGJ7ne X-Received: by 2002:a9d:175:: with SMTP id 108mr2606830otu.325.1576076973990; Wed, 11 Dec 2019 07:09:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576076973; cv=none; d=google.com; s=arc-20160816; b=KpSKNnfYMieIFYXazKUnlgZwlTopxkmKmZ7/aeZZQBSzOcH0EufMb8zpn/2OIYM+nY 1tpdWuBSY1KCP9drc4EYS/Yh3GOgwzXs/P5ZD89Su+mwMQj2J0ZJlepZ/FI9G+XnuXa3 T3xJ6n0Wv3Ftt0jnuZC0YeLy4pJwHpRWTLl9zUlYd3zCV5e61zR1HvSjLHItWlj2DzbE s/exM6A8Y2hEdOk5dmNUkDln8GwMI/d4yAAF1fKYpKmDOO0PG74Waw2CgIL73n8mAmt4 ADTKsY16wBvfCIgQ/3rzAqwBuPiWnRtWfD4I1JcZ6IB6Qd5s/yeSQ5xGWSE+xpZ79eOf uYYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=1GCeVi0wFHUJ20MAZg8EOwin7RX10f+3oLY6JTc9rH0=; b=GTNXOmEQ8qPmq9Wqs1BK/HsWcFeEKwr0NQ4dGxWZaMOJbxZvwfXRAhMtuC9bgFeuwW Ui0Hz2yK2Ws8xi0JWmsDCsVdWn20piwjXimRXWzh1XsQxvJdqIoYU2gU78Pj2lWMUq/P shhPNQADjhehWwGD7J1DxD9hO1YoN9qocqMU+d/YawyavTlX9Vf68eb2MNl+O+5mPNip sx99YPmxFwRTJdVnvxGPlefKsa1NlZU/I1beeZNmwZaeVh9zSizBPZFAEH1a52ajYuje SDIpGH4GHl8VqGQll/PdJx4W3fMLq9BDewWy4uG/0gadgAv7Osz+BL/F5J+KwZJSlaZo TKww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Vnsy1gCl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l64si1326524oih.2.2019.12.11.07.09.33; Wed, 11 Dec 2019 07:09:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Vnsy1gCl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730611AbfLKPJc (ORCPT + 27 others); Wed, 11 Dec 2019 10:09:32 -0500 Received: from mail.kernel.org ([198.145.29.99]:57454 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729469AbfLKPJ1 (ORCPT ); Wed, 11 Dec 2019 10:09:27 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 35CCB2173E; Wed, 11 Dec 2019 15:09:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1576076966; bh=6rSHqQOKRJDP5GDgm2zXS+ZfuDLtPuPcrmNNgsXGsn8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Vnsy1gCllHvh9AZ8euBbrfTQUWoirv2zDaVkFCD+xZePtezJyuYOrp+/DOlkGAnA8 VGV2PXn07WfFdGT1D2cuCuKaj/zyYGbbvtWSHWPc9axWPg5qbMRg6jHeSZg+iqmRE+ NR0lD5g0fdBrmV9+3xsuiXDciKtIZ1k5gROIz/Gg= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Leo Yan , Mathieu Poirier , Mike Leach Subject: [PATCH 5.4 41/92] coresight: etm4x: Fix input validation for sysfs. Date: Wed, 11 Dec 2019 16:05:32 +0100 Message-Id: <20191211150240.186092611@linuxfoundation.org> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20191211150221.977775294@linuxfoundation.org> References: <20191211150221.977775294@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mike Leach commit 2fe6899e36aa174abefd017887f9cfe0cb60c43a upstream. A number of issues are fixed relating to sysfs input validation:- 1) bb_ctrl_store() - incorrect compare of bit select field to absolute value. Reworked per ETMv4 specification. 2) seq_event_store() - incorrect mask value - register has two event values. 3) cyc_threshold_store() - must mask with max before checking min otherwise wrapped values can set illegal value below min. 4) res_ctrl_store() - update to mask off all res0 bits. Reviewed-by: Leo Yan Reviewed-by: Mathieu Poirier Signed-off-by: Mike Leach Fixes: a77de2637c9eb ("coresight: etm4x: moving sysFS entries to a dedicated file") Cc: stable # 4.9+ Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20191104181251.26732-6-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman --- drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 21 ++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -652,10 +652,13 @@ static ssize_t cyc_threshold_store(struc if (kstrtoul(buf, 16, &val)) return -EINVAL; + + /* mask off max threshold before checking min value */ + val &= ETM_CYC_THRESHOLD_MASK; if (val < drvdata->ccitmin) return -EINVAL; - config->ccctlr = val & ETM_CYC_THRESHOLD_MASK; + config->ccctlr = val; return size; } static DEVICE_ATTR_RW(cyc_threshold); @@ -686,14 +689,16 @@ static ssize_t bb_ctrl_store(struct devi return -EINVAL; if (!drvdata->nr_addr_cmp) return -EINVAL; + /* - * Bit[7:0] selects which address range comparator is used for - * branch broadcast control. + * Bit[8] controls include(1) / exclude(0), bits[0-7] select + * individual range comparators. If include then at least 1 + * range must be selected. */ - if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp) + if ((val & BIT(8)) && (BMVAL(val, 0, 7) == 0)) return -EINVAL; - config->bb_ctrl = val; + config->bb_ctrl = val & GENMASK(8, 0); return size; } static DEVICE_ATTR_RW(bb_ctrl); @@ -1324,8 +1329,8 @@ static ssize_t seq_event_store(struct de spin_lock(&drvdata->spinlock); idx = config->seq_idx; - /* RST, bits[7:0] */ - config->seq_ctrl[idx] = val & 0xFF; + /* Seq control has two masks B[15:8] F[7:0] */ + config->seq_ctrl[idx] = val & 0xFFFF; spin_unlock(&drvdata->spinlock); return size; } @@ -1580,7 +1585,7 @@ static ssize_t res_ctrl_store(struct dev if (idx % 2 != 0) /* PAIRINV, bit[21] */ val &= ~BIT(21); - config->res_ctrl[idx] = val; + config->res_ctrl[idx] = val & GENMASK(21, 0); spin_unlock(&drvdata->spinlock); return size; }