From patchwork Wed Dec 11 15:06:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 181279 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp707316ile; Wed, 11 Dec 2019 07:48:40 -0800 (PST) X-Google-Smtp-Source: APXvYqwR2bpiNc9IAFzprXj0UsFrUXBB9s4pg1eMs2yyDPwrFeMF9SxPRJqHbkQvPoIilRS/yeqT X-Received: by 2002:aca:1a10:: with SMTP id a16mr3395844oia.9.1576079320436; Wed, 11 Dec 2019 07:48:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576079320; cv=none; d=google.com; s=arc-20160816; b=fTgyzjOAfPsrExaGMdeRZsYNxuwNvg3FrODWuBMFlo+TQHkXESqLkti5FYBDCmp6A/ Soc1PhZd1BQEdx2IMPA2FliL52vSK/tCX8L4B85hsY1EJarhcjgfY5Ta0afvE+UUJBxk H6ylHmta3k9o0IiRKuwK6plNoeF+1YdGnxiVrmIsZBhXa+pj9HgCWwFB8YUU2CgPV6BH CbTi3pdyIFS7EoQGAV/jnYvYhiLXtIkWtGT97XN/R+3C88NsnPCKVYwxyprYCxWZXnbj FU5x9zyU5BOr+O7bTLr8sZclrcu4jd7oPHlRNer5hP39vMzAssVp6lMzB5+zBVKxHkZB rxHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=RjR81QkhQYv19sOxqFt1wMuPFOEIEZCYoCmWCgMMF6Y=; b=X+kA39XwyWM0Zl85QX1TPmO+pGi5jjiOKojzW6T0VMnhPrKz7zwkJm/7+c5XjGzPTn iy81fI7Su+euvk7jxcMZXQABHkt68cDIctdJ85WjJ7IJVqKxN3/l2la9DbdZMy31IvMM xbNTkcAbUrroypBe7uQw5b2kqwRC4CXRwXU7TURaS9UIIHmt9U6AuXDEoa8KymfBdfR3 P7SXuUNg+6x9U3CC31H4PFQQc3r01e72LXt6b23CZoD2oWxsWWxuJmK0rgeEXh8O8NHU zY61a+UZdHRPyKl6Syazg98QcRwefUh5cvlavgA8ICUOLJhoRNKP2xVUgg/c4/LKb2+v DNMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=uk5c8sQ+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f81si1398203oig.110.2019.12.11.07.48.40; Wed, 11 Dec 2019 07:48:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=uk5c8sQ+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732902AbfLKPYv (ORCPT + 27 others); Wed, 11 Dec 2019 10:24:51 -0500 Received: from mail.kernel.org ([198.145.29.99]:56216 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732886AbfLKPYr (ORCPT ); Wed, 11 Dec 2019 10:24:47 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A6B9C2077B; Wed, 11 Dec 2019 15:24:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1576077886; bh=cQnHYqMKMnTnO6m2mJKlDYRQy3IpoH92Ix9Topw/7fc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uk5c8sQ+uscbXDNvSF0hQ0tEZbVeJumB8hfWablHMkrqGc39E0C6a11w9KjfV+3gY BC2ocYWI+ZjaLiK5uRMwAOkWZm7x0oWLpz5LWY8+BNlCxp0w28to+otEq0AxZpY7HV 2HjIJaynu0e9FofgoMUoNzuDN/GAGZNPBHV1yoGQ= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Leo Yan , Mathieu Poirier , Mike Leach Subject: [PATCH 4.19 208/243] coresight: etm4x: Fix input validation for sysfs. Date: Wed, 11 Dec 2019 16:06:10 +0100 Message-Id: <20191211150353.224230883@linuxfoundation.org> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20191211150339.185439726@linuxfoundation.org> References: <20191211150339.185439726@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mike Leach commit 2fe6899e36aa174abefd017887f9cfe0cb60c43a upstream. A number of issues are fixed relating to sysfs input validation:- 1) bb_ctrl_store() - incorrect compare of bit select field to absolute value. Reworked per ETMv4 specification. 2) seq_event_store() - incorrect mask value - register has two event values. 3) cyc_threshold_store() - must mask with max before checking min otherwise wrapped values can set illegal value below min. 4) res_ctrl_store() - update to mask off all res0 bits. Reviewed-by: Leo Yan Reviewed-by: Mathieu Poirier Signed-off-by: Mike Leach Fixes: a77de2637c9eb ("coresight: etm4x: moving sysFS entries to a dedicated file") Cc: stable # 4.9+ Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20191104181251.26732-6-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman --- drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 21 ++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -655,10 +655,13 @@ static ssize_t cyc_threshold_store(struc if (kstrtoul(buf, 16, &val)) return -EINVAL; + + /* mask off max threshold before checking min value */ + val &= ETM_CYC_THRESHOLD_MASK; if (val < drvdata->ccitmin) return -EINVAL; - config->ccctlr = val & ETM_CYC_THRESHOLD_MASK; + config->ccctlr = val; return size; } static DEVICE_ATTR_RW(cyc_threshold); @@ -689,14 +692,16 @@ static ssize_t bb_ctrl_store(struct devi return -EINVAL; if (!drvdata->nr_addr_cmp) return -EINVAL; + /* - * Bit[7:0] selects which address range comparator is used for - * branch broadcast control. + * Bit[8] controls include(1) / exclude(0), bits[0-7] select + * individual range comparators. If include then at least 1 + * range must be selected. */ - if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp) + if ((val & BIT(8)) && (BMVAL(val, 0, 7) == 0)) return -EINVAL; - config->bb_ctrl = val; + config->bb_ctrl = val & GENMASK(8, 0); return size; } static DEVICE_ATTR_RW(bb_ctrl); @@ -1329,8 +1334,8 @@ static ssize_t seq_event_store(struct de spin_lock(&drvdata->spinlock); idx = config->seq_idx; - /* RST, bits[7:0] */ - config->seq_ctrl[idx] = val & 0xFF; + /* Seq control has two masks B[15:8] F[7:0] */ + config->seq_ctrl[idx] = val & 0xFFFF; spin_unlock(&drvdata->spinlock); return size; } @@ -1585,7 +1590,7 @@ static ssize_t res_ctrl_store(struct dev if (idx % 2 != 0) /* PAIRINV, bit[21] */ val &= ~BIT(21); - config->res_ctrl[idx] = val; + config->res_ctrl[idx] = val & GENMASK(21, 0); spin_unlock(&drvdata->spinlock); return size; }