[2/2] target/s390x: Implement LOAD/STORE TO REAL ADDRESS inline

Message ID 20191211203614.15611-3-richard.henderson@linaro.org
State New
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Series
  • target/s390x: Implement LOAD/STORE TO REAL ADDRESS inline
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Commit Message

Richard Henderson Dec. 11, 2019, 8:36 p.m.
These are trivially done by performing a memory operation
with the correct mmu_idx.  The only tricky part is using
get_address directly in order to get the address wrapped;
we cannot use la2 because of the format.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/s390x/helper.h      |  4 ----
 target/s390x/mem_helper.c  | 22 ----------------------
 target/s390x/translate.c   | 21 ++++-----------------
 target/s390x/insn-data.def |  8 ++++----
 4 files changed, 8 insertions(+), 47 deletions(-)

-- 
2.20.1

Comments

David Hildenbrand Dec. 12, 2019, 10:35 a.m. | #1
On 11.12.19 21:36, Richard Henderson wrote:
> These are trivially done by performing a memory operation

> with the correct mmu_idx.  The only tricky part is using

> get_address directly in order to get the address wrapped;

> we cannot use la2 because of the format.

> 

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/s390x/helper.h      |  4 ----

>  target/s390x/mem_helper.c  | 22 ----------------------

>  target/s390x/translate.c   | 21 ++++-----------------

>  target/s390x/insn-data.def |  8 ++++----

>  4 files changed, 8 insertions(+), 47 deletions(-)

> 

> diff --git a/target/s390x/helper.h b/target/s390x/helper.h

> index f5b4bb6a31..b5813c2ac2 100644

> --- a/target/s390x/helper.h

> +++ b/target/s390x/helper.h

> @@ -324,10 +324,6 @@ DEF_HELPER_FLAGS_4(ipte, TCG_CALL_NO_RWG, void, env, i64, i64, i32)

>  DEF_HELPER_FLAGS_1(ptlb, TCG_CALL_NO_RWG, void, env)

>  DEF_HELPER_FLAGS_1(purge, TCG_CALL_NO_RWG, void, env)

>  DEF_HELPER_2(lra, i64, env, i64)

> -DEF_HELPER_FLAGS_2(lura, TCG_CALL_NO_WG, i64, env, i64)

> -DEF_HELPER_FLAGS_2(lurag, TCG_CALL_NO_WG, i64, env, i64)

> -DEF_HELPER_FLAGS_3(stura, TCG_CALL_NO_WG, void, env, i64, i64)

> -DEF_HELPER_FLAGS_3(sturg, TCG_CALL_NO_WG, void, env, i64, i64)

>  DEF_HELPER_1(per_check_exception, void, env)

>  DEF_HELPER_FLAGS_3(per_branch, TCG_CALL_NO_RWG, void, env, i64, i64)

>  DEF_HELPER_FLAGS_2(per_ifetch, TCG_CALL_NO_RWG, void, env, i64)

> diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c

> index b1b3f406c9..2921419c27 100644

> --- a/target/s390x/mem_helper.c

> +++ b/target/s390x/mem_helper.c

> @@ -2329,28 +2329,6 @@ void HELPER(purge)(CPUS390XState *env)

>      tlb_flush_all_cpus_synced(env_cpu(env));

>  }

>  

> -/* load using real address */

> -uint64_t HELPER(lura)(CPUS390XState *env, uint64_t addr)

> -{

> -    return cpu_ldl_real_ra(env, wrap_address(env, addr), GETPC());

> -}

> -

> -uint64_t HELPER(lurag)(CPUS390XState *env, uint64_t addr)

> -{

> -    return cpu_ldq_real_ra(env, wrap_address(env, addr), GETPC());

> -}

> -

> -/* store using real address */

> -void HELPER(stura)(CPUS390XState *env, uint64_t addr, uint64_t v1)

> -{

> -    cpu_stl_real_ra(env, wrap_address(env, addr), (uint32_t)v1, GETPC());

> -}

> -

> -void HELPER(sturg)(CPUS390XState *env, uint64_t addr, uint64_t v1)

> -{

> -    cpu_stq_real_ra(env, wrap_address(env, addr), v1, GETPC());

> -}

> -

>  /* load real address */

>  uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr)

>  {

> diff --git a/target/s390x/translate.c b/target/s390x/translate.c

> index ef751fefa4..4292bb0dd0 100644

> --- a/target/s390x/translate.c

> +++ b/target/s390x/translate.c

> @@ -3272,13 +3272,8 @@ static DisasJumpType op_lpq(DisasContext *s, DisasOps *o)

>  #ifndef CONFIG_USER_ONLY

>  static DisasJumpType op_lura(DisasContext *s, DisasOps *o)

>  {

> -    gen_helper_lura(o->out, cpu_env, o->in2);

> -    return DISAS_NEXT;

> -}

> -

> -static DisasJumpType op_lurag(DisasContext *s, DisasOps *o)

> -{

> -    gen_helper_lurag(o->out, cpu_env, o->in2);

> +    o->addr1 = get_address(s, 0, get_field(s->fields, r2), 0);

> +    tcg_gen_qemu_ld_tl(o->out, o->addr1, MMU_REAL_IDX, s->insn->data);

>      return DISAS_NEXT;

>  }

>  #endif

> @@ -4506,17 +4501,9 @@ static DisasJumpType op_stnosm(DisasContext *s, DisasOps *o)

>  

>  static DisasJumpType op_stura(DisasContext *s, DisasOps *o)

>  {

> -    gen_helper_stura(cpu_env, o->in2, o->in1);

> -    if (s->base.tb->flags & FLAG_MASK_PER) {

> -        update_psw_addr(s);

> -        gen_helper_per_store_real(cpu_env);

> -    }

> -    return DISAS_NEXT;

> -}

> +    o->addr1 = get_address(s, 0, get_field(s->fields, r2), 0);

> +    tcg_gen_qemu_st_tl(o->in1, o->addr1, MMU_REAL_IDX, s->insn->data);

>  

> -static DisasJumpType op_sturg(DisasContext *s, DisasOps *o)

> -{

> -    gen_helper_sturg(cpu_env, o->in2, o->in1);

>      if (s->base.tb->flags & FLAG_MASK_PER) {

>          update_psw_addr(s);

>          gen_helper_per_store_real(cpu_env);

> diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def

> index 449eee1662..2bc77f0871 100644

> --- a/target/s390x/insn-data.def

> +++ b/target/s390x/insn-data.def

> @@ -1275,8 +1275,8 @@

>      F(0xe313, LRAY,    RXY_a, LD,  0, a2, r1, 0, lra, 0, IF_PRIV)

>      F(0xe303, LRAG,    RXY_a, Z,   0, a2, r1, 0, lra, 0, IF_PRIV)

>  /* LOAD USING REAL ADDRESS */

> -    F(0xb24b, LURA,    RRE,   Z,   0, r2, new, r1_32, lura, 0, IF_PRIV)

> -    F(0xb905, LURAG,   RRE,   Z,   0, r2, r1, 0, lurag, 0, IF_PRIV)

> +    E(0xb24b, LURA,    RRE,   Z,   0, 0, new, r1_32, lura, 0, MO_TEUL, IF_PRIV)

> +    E(0xb905, LURAG,   RRE,   Z,   0, 0, r1, 0, lura, 0, MO_TEQ, IF_PRIV)

>  /* MOVE TO PRIMARY */

>      F(0xda00, MVCP,    SS_d,  Z,   la1, a2, 0, 0, mvcp, 0, IF_PRIV)

>  /* MOVE TO SECONDARY */

> @@ -1329,8 +1329,8 @@

>  /* STORE THEN OR SYSTEM MASK */

>      F(0xad00, STOSM,   SI,    Z,   la1, 0, 0, 0, stnosm, 0, IF_PRIV)

>  /* STORE USING REAL ADDRESS */

> -    F(0xb246, STURA,   RRE,   Z,   r1_o, r2_o, 0, 0, stura, 0, IF_PRIV)

> -    F(0xb925, STURG,   RRE,   Z,   r1_o, r2_o, 0, 0, sturg, 0, IF_PRIV)

> +    E(0xb246, STURA,   RRE,   Z,   r1_o, 0, 0, 0, stura, 0, MO_TEUL, IF_PRIV)

> +    E(0xb925, STURG,   RRE,   Z,   r1_o, 0, 0, 0, stura, 0, MO_TEQ, IF_PRIV)

>  /* TEST BLOCK */

>      F(0xb22c, TB,      RRE,   Z,   0, r2_o, 0, 0, testblock, 0, IF_PRIV)

>  /* TEST PROTECTION */

> 


So the MMU_REAL indeed does pay off in various ways ;)

Thanks!

Reviewed-by: David Hildenbrand <david@redhat.com>


-- 
Thanks,

David / dhildenb

Patch

diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index f5b4bb6a31..b5813c2ac2 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -324,10 +324,6 @@  DEF_HELPER_FLAGS_4(ipte, TCG_CALL_NO_RWG, void, env, i64, i64, i32)
 DEF_HELPER_FLAGS_1(ptlb, TCG_CALL_NO_RWG, void, env)
 DEF_HELPER_FLAGS_1(purge, TCG_CALL_NO_RWG, void, env)
 DEF_HELPER_2(lra, i64, env, i64)
-DEF_HELPER_FLAGS_2(lura, TCG_CALL_NO_WG, i64, env, i64)
-DEF_HELPER_FLAGS_2(lurag, TCG_CALL_NO_WG, i64, env, i64)
-DEF_HELPER_FLAGS_3(stura, TCG_CALL_NO_WG, void, env, i64, i64)
-DEF_HELPER_FLAGS_3(sturg, TCG_CALL_NO_WG, void, env, i64, i64)
 DEF_HELPER_1(per_check_exception, void, env)
 DEF_HELPER_FLAGS_3(per_branch, TCG_CALL_NO_RWG, void, env, i64, i64)
 DEF_HELPER_FLAGS_2(per_ifetch, TCG_CALL_NO_RWG, void, env, i64)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index b1b3f406c9..2921419c27 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -2329,28 +2329,6 @@  void HELPER(purge)(CPUS390XState *env)
     tlb_flush_all_cpus_synced(env_cpu(env));
 }
 
-/* load using real address */
-uint64_t HELPER(lura)(CPUS390XState *env, uint64_t addr)
-{
-    return cpu_ldl_real_ra(env, wrap_address(env, addr), GETPC());
-}
-
-uint64_t HELPER(lurag)(CPUS390XState *env, uint64_t addr)
-{
-    return cpu_ldq_real_ra(env, wrap_address(env, addr), GETPC());
-}
-
-/* store using real address */
-void HELPER(stura)(CPUS390XState *env, uint64_t addr, uint64_t v1)
-{
-    cpu_stl_real_ra(env, wrap_address(env, addr), (uint32_t)v1, GETPC());
-}
-
-void HELPER(sturg)(CPUS390XState *env, uint64_t addr, uint64_t v1)
-{
-    cpu_stq_real_ra(env, wrap_address(env, addr), v1, GETPC());
-}
-
 /* load real address */
 uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr)
 {
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index ef751fefa4..4292bb0dd0 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -3272,13 +3272,8 @@  static DisasJumpType op_lpq(DisasContext *s, DisasOps *o)
 #ifndef CONFIG_USER_ONLY
 static DisasJumpType op_lura(DisasContext *s, DisasOps *o)
 {
-    gen_helper_lura(o->out, cpu_env, o->in2);
-    return DISAS_NEXT;
-}
-
-static DisasJumpType op_lurag(DisasContext *s, DisasOps *o)
-{
-    gen_helper_lurag(o->out, cpu_env, o->in2);
+    o->addr1 = get_address(s, 0, get_field(s->fields, r2), 0);
+    tcg_gen_qemu_ld_tl(o->out, o->addr1, MMU_REAL_IDX, s->insn->data);
     return DISAS_NEXT;
 }
 #endif
@@ -4506,17 +4501,9 @@  static DisasJumpType op_stnosm(DisasContext *s, DisasOps *o)
 
 static DisasJumpType op_stura(DisasContext *s, DisasOps *o)
 {
-    gen_helper_stura(cpu_env, o->in2, o->in1);
-    if (s->base.tb->flags & FLAG_MASK_PER) {
-        update_psw_addr(s);
-        gen_helper_per_store_real(cpu_env);
-    }
-    return DISAS_NEXT;
-}
+    o->addr1 = get_address(s, 0, get_field(s->fields, r2), 0);
+    tcg_gen_qemu_st_tl(o->in1, o->addr1, MMU_REAL_IDX, s->insn->data);
 
-static DisasJumpType op_sturg(DisasContext *s, DisasOps *o)
-{
-    gen_helper_sturg(cpu_env, o->in2, o->in1);
     if (s->base.tb->flags & FLAG_MASK_PER) {
         update_psw_addr(s);
         gen_helper_per_store_real(cpu_env);
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 449eee1662..2bc77f0871 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1275,8 +1275,8 @@ 
     F(0xe313, LRAY,    RXY_a, LD,  0, a2, r1, 0, lra, 0, IF_PRIV)
     F(0xe303, LRAG,    RXY_a, Z,   0, a2, r1, 0, lra, 0, IF_PRIV)
 /* LOAD USING REAL ADDRESS */
-    F(0xb24b, LURA,    RRE,   Z,   0, r2, new, r1_32, lura, 0, IF_PRIV)
-    F(0xb905, LURAG,   RRE,   Z,   0, r2, r1, 0, lurag, 0, IF_PRIV)
+    E(0xb24b, LURA,    RRE,   Z,   0, 0, new, r1_32, lura, 0, MO_TEUL, IF_PRIV)
+    E(0xb905, LURAG,   RRE,   Z,   0, 0, r1, 0, lura, 0, MO_TEQ, IF_PRIV)
 /* MOVE TO PRIMARY */
     F(0xda00, MVCP,    SS_d,  Z,   la1, a2, 0, 0, mvcp, 0, IF_PRIV)
 /* MOVE TO SECONDARY */
@@ -1329,8 +1329,8 @@ 
 /* STORE THEN OR SYSTEM MASK */
     F(0xad00, STOSM,   SI,    Z,   la1, 0, 0, 0, stnosm, 0, IF_PRIV)
 /* STORE USING REAL ADDRESS */
-    F(0xb246, STURA,   RRE,   Z,   r1_o, r2_o, 0, 0, stura, 0, IF_PRIV)
-    F(0xb925, STURG,   RRE,   Z,   r1_o, r2_o, 0, 0, sturg, 0, IF_PRIV)
+    E(0xb246, STURA,   RRE,   Z,   r1_o, 0, 0, 0, stura, 0, MO_TEUL, IF_PRIV)
+    E(0xb925, STURG,   RRE,   Z,   r1_o, 0, 0, 0, stura, 0, MO_TEQ, IF_PRIV)
 /* TEST BLOCK */
     F(0xb22c, TB,      RRE,   Z,   0, r2_o, 0, 0, testblock, 0, IF_PRIV)
 /* TEST PROTECTION */