From patchwork Thu Dec 12 13:05:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 181474 Delivered-To: patch@linaro.org Received: by 2002:ac9:44c4:0:0:0:0:0 with SMTP id t4csp744124och; Thu, 12 Dec 2019 05:06:27 -0800 (PST) X-Google-Smtp-Source: APXvYqz695nKWvGWEDKdOnBgQHM3mqtC+mMao49wryXyL5dIqR1pK1FT3xGDG/F3vb7+yl/RIsRr X-Received: by 2002:aca:52c7:: with SMTP id g190mr4677655oib.84.1576155987579; Thu, 12 Dec 2019 05:06:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576155987; cv=none; d=google.com; s=arc-20160816; b=ZNzNnkbAR13M24uBHebSqj6kVjAPTdL4L7XKdg14YmXyhjtcR9drQ/2+SJkwoV0dOd zhXvcAGjTc3oeZesfDezFbtUfM8hfN8iuqkv6dbkpeQINKrZgRXFQmBB066VjLFn+qUN iC3mftjJdsysrTRGQEDKqWZy3v08R0DqmS400Z5WVZlftZzutChA948Kmg9aoGlqwAbf Am6VqLdivHg1LrhcVVaBFSVMENCaiGiaoUOr+nK0/3SwdARsYGEYwtAgAZuUdFlW0Xp0 b5NTdQqvgPtawWDO1owj6m8N2aNfXpPtmwOYiCteB0JqIRpVabr5F3LcCogl4mjI9yNf l3eA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=ti51rTV6c8ZSMS8P9ZaZrX2hos6jao0jMbrGOB4FUbk=; b=e9dvAntwjKfJ3o/uFZdQ0zU5sDAeie3Zfp2GZPZNHuQAsGX9paywQuXvo/LtdNt3ju iZJjs2eO/ambWmRXZrZ8MoSf9e0UbliVxoUaL4M3OzXIx+ohJKt0zda3ewu+/hH2TsQM 7NdY7ThD1ceMfUADe9Q4CotNYR7Xzk2rgWrdoqHSV+23AXkSiGcjSzhKd+i+xxU96B/C iKV6lIOz9+ygBUdkGCAzdpwoziZE8g1I/Gs4z3Y0+LONjcPQFITAv/Zv42a28mVTQDzN 7y0QpRIQ26g4DWfbvJ+NfXazim+AXk7S4T0WlidVNQB+KZ+3o1TJ4dD0SE9inNhO00G2 h5BA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=kP0VI02D; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w64si2830708oif.51.2019.12.12.05.06.27; Thu, 12 Dec 2019 05:06:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=kP0VI02D; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729359AbfLLNGU (ORCPT + 4 others); Thu, 12 Dec 2019 08:06:20 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:42820 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729297AbfLLNGT (ORCPT ); Thu, 12 Dec 2019 08:06:19 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBCD6EPi105801; Thu, 12 Dec 2019 07:06:14 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1576155974; bh=ti51rTV6c8ZSMS8P9ZaZrX2hos6jao0jMbrGOB4FUbk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=kP0VI02D7shB2PJ+VamHrvEV3MSABBoVKktUX2cCdQoWaOwVLazROjboaBOiBRORS V/at1jwjyMdRVgdHSkVsGKNoLJQZEcoAXBesh1nEugetnV/W4oFVoK5qY3yz+XFANb j9LhXUHmKh+8As18NC9hk3z/jSbXDKqEjeEC1TBE= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xBCD6ETS074439 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 12 Dec 2019 07:06:14 -0600 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 12 Dec 2019 07:06:13 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 12 Dec 2019 07:06:13 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBCD66KF069503; Thu, 12 Dec 2019 07:06:12 -0600 From: Tero Kristo To: , CC: , Subject: [PATCH 4/5] ARM: OMAP2+: omap-iommu.c conversion to ti-sysc Date: Thu, 12 Dec 2019 15:05:40 +0200 Message-ID: <20191212130541.3657-5-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191212130541.3657-1-t-kristo@ti.com> References: <20191212130541.3657-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Convert omap2 iommu platform code to use ti-sysc instead of legacy omap-device / hwmod interfaces. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/omap-iommu.c | 99 ++++++++++++++++++++++++++------ 1 file changed, 80 insertions(+), 19 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c index 78247e6f4a72..54aff33e55e6 100644 --- a/arch/arm/mach-omap2/omap-iommu.c +++ b/arch/arm/mach-omap2/omap-iommu.c @@ -8,19 +8,27 @@ #include #include +#include +#include -#include "omap_hwmod.h" -#include "omap_device.h" #include "clockdomain.h" #include "powerdomain.h" +struct pwrdm_link { + struct device *dev; + struct powerdomain *pwrdm; + struct list_head node; +}; + +static DEFINE_SPINLOCK(iommu_lock); +static struct clockdomain *emu_clkdm; +static atomic_t emu_count; + static void omap_iommu_dra7_emu_swsup_config(struct platform_device *pdev, bool enable) { - static struct clockdomain *emu_clkdm; - static DEFINE_SPINLOCK(emu_lock); - static atomic_t count; struct device_node *np = pdev->dev.of_node; + unsigned long flags; if (!of_device_is_compatible(np, "ti,dra7-dsp-iommu")) return; @@ -31,34 +39,87 @@ static void omap_iommu_dra7_emu_swsup_config(struct platform_device *pdev, return; } - spin_lock(&emu_lock); + spin_lock_irqsave(&iommu_lock, flags); - if (enable && (atomic_inc_return(&count) == 1)) + if (enable && (atomic_inc_return(&emu_count) == 1)) clkdm_deny_idle(emu_clkdm); - else if (!enable && (atomic_dec_return(&count) == 0)) + else if (!enable && (atomic_dec_return(&emu_count) == 0)) clkdm_allow_idle(emu_clkdm); - spin_unlock(&emu_lock); + spin_unlock_irqrestore(&iommu_lock, flags); +} + +static struct powerdomain *_get_pwrdm(struct device *dev) +{ + struct clk *clk; + struct clk_hw_omap *hwclk; + struct clockdomain *clkdm; + struct powerdomain *pwrdm = NULL; + struct pwrdm_link *entry; + unsigned long flags; + static LIST_HEAD(cache); + + spin_lock_irqsave(&iommu_lock, flags); + + list_for_each_entry(entry, &cache, node) { + if (entry->dev == dev) { + pwrdm = entry->pwrdm; + break; + } + } + + spin_unlock_irqrestore(&iommu_lock, flags); + + if (pwrdm) + return pwrdm; + + clk = of_clk_get(dev->of_node->parent, 0); + if (!clk) { + dev_err(dev, "no fck found\n"); + return NULL; + } + + hwclk = to_clk_hw_omap(__clk_get_hw(clk)); + clk_put(clk); + if (!hwclk || !hwclk->clkdm_name) { + dev_err(dev, "no hwclk data\n"); + return NULL; + } + + clkdm = clkdm_lookup(hwclk->clkdm_name); + if (!clkdm) { + dev_err(dev, "clkdm not found: %s\n", hwclk->clkdm_name); + return NULL; + } + + pwrdm = clkdm_get_pwrdm(clkdm); + if (!pwrdm) { + dev_err(dev, "pwrdm not found: %s\n", clkdm->name); + return NULL; + } + + entry = kmalloc(sizeof(*entry), GFP_KERNEL); + if (entry) { + entry->dev = dev; + entry->pwrdm = pwrdm; + spin_lock_irqsave(&iommu_lock, flags); + list_add(&entry->node, &cache); + spin_unlock_irqrestore(&iommu_lock, flags); + } + + return pwrdm; } int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request, u8 *pwrst) { struct powerdomain *pwrdm; - struct omap_device *od; u8 next_pwrst; int ret = 0; - od = to_omap_device(pdev); - if (!od) - return -ENODEV; - - if (od->hwmods_cnt != 1) - return -EINVAL; - - pwrdm = omap_hwmod_get_pwrdm(od->hwmods[0]); + pwrdm = _get_pwrdm(&pdev->dev); if (!pwrdm) - return -EINVAL; + return -ENODEV; if (request) { *pwrst = pwrdm_read_next_pwrst(pwrdm);