diff mbox series

[v2,04/21] target/arm: Define and use any_predinv isar_feature test

Message ID 20200214175116.9164-5-peter.maydell@linaro.org
State Superseded
Headers show
Series arm: ARMv8.1- and v8.4-PMU, ID reg cleanup, [H]ACTLR2 | expand

Commit Message

Peter Maydell Feb. 14, 2020, 5:50 p.m. UTC 
Instead of open-coding "ARM_FEATURE_AARCH64 ? aa64_predinv: aa32_predinv",
define and use an any_predinv isar_feature test function.

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 target/arm/cpu.h    | 5 +++++
 target/arm/helper.c | 9 +--------
 2 files changed, 6 insertions(+), 8 deletions(-)

-- 
2.20.1
diff mbox series

Patch

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7ccd65bdce3..ef0feb228ab 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3677,6 +3677,11 @@  static inline bool isar_feature_any_fp16(const ARMISARegisters *id)
     return isar_feature_aa64_fp16(id) || isar_feature_aa32_fp16_arith(id);
 }
 
+static inline bool isar_feature_any_predinv(const ARMISARegisters *id)
+{
+    return isar_feature_aa64_predinv(id) || isar_feature_aa32_predinv(id);
+}
+
 /*
  * Forward to the above feature tests given an ARMCPU pointer.
  */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index d4ed52981fa..b3ced7f78ba 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7721,14 +7721,7 @@  void register_cp_regs_for_features(ARMCPU *cpu)
 #endif /*CONFIG_USER_ONLY*/
 #endif
 
-    /*
-     * While all v8.0 cpus support aarch64, QEMU does have configurations
-     * that do not set ID_AA64ISAR1, e.g. user-only qemu-arm -cpu max,
-     * which will set ID_ISAR6.
-     */
-    if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)
-        ? cpu_isar_feature(aa64_predinv, cpu)
-        : cpu_isar_feature(aa32_predinv, cpu)) {
+    if (cpu_isar_feature(any_predinv, cpu)) {
         define_arm_cp_regs(cpu, predinv_reginfo);
     }