| Message ID | 20200214181547.21408-13-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/arm: vfp feature and decodetree cleanup | expand |
On Fri, 14 Feb 2020 at 18:16, Richard Henderson <richard.henderson@linaro.org> wrote: > > We now have proper ISA checks within each trans_* function. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/translate.c | 4 ---- > 1 file changed, 4 deletions(-) > > diff --git a/target/arm/translate.c b/target/arm/translate.c > index 0da780102c..e8c3d4f26f 100644 > --- a/target/arm/translate.c > +++ b/target/arm/translate.c > @@ -2652,10 +2652,6 @@ static void gen_neon_dup_high16(TCGv_i32 var) > */ > static int disas_vfp_insn(DisasContext *s, uint32_t insn) > { > - if (!arm_dc_feature(s, ARM_FEATURE_VFP)) { > - return 1; > - } > - > /* > * If the decodetree decoder handles this insn it will always > * emit code to either execute the insn or generate an appropriate > -- > 2.20.1 Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/target/arm/translate.c b/target/arm/translate.c index 0da780102c..e8c3d4f26f 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -2652,10 +2652,6 @@ static void gen_neon_dup_high16(TCGv_i32 var) */ static int disas_vfp_insn(DisasContext *s, uint32_t insn) { - if (!arm_dc_feature(s, ARM_FEATURE_VFP)) { - return 1; - } - /* * If the decodetree decoder handles this insn it will always * emit code to either execute the insn or generate an appropriate
We now have proper ISA checks within each trans_* function. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/translate.c | 4 ---- 1 file changed, 4 deletions(-) -- 2.20.1