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[1/3] target/arm: Fix wrong use of FIELD_EX32 on ID_AA64DFR0

Message ID 20200224172846.13053-2-peter.maydell@linaro.org
State Superseded
Headers show
Series target/arm: Implement v8.3-RCPC and v8.4-RCPC | expand

Commit Message

Peter Maydell Feb. 24, 2020, 5:28 p.m. UTC
We missed an instance of using FIELD_EX32 on a 64-bit ID
register, in isar_feature_aa64_pmu_8_4(). Fix it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 target/arm/cpu.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

-- 
2.20.1

Comments

Philippe Mathieu-Daudé Feb. 24, 2020, 5:48 p.m. UTC | #1
On 2/24/20 6:28 PM, Peter Maydell wrote:
> We missed an instance of using FIELD_EX32 on a 64-bit ID

> register, in isar_feature_aa64_pmu_8_4(). Fix it.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

> ---

>   target/arm/cpu.h | 4 ++--

>   1 file changed, 2 insertions(+), 2 deletions(-)

> 

> diff --git a/target/arm/cpu.h b/target/arm/cpu.h

> index 65171cb30ee..b647d8df916 100644

> --- a/target/arm/cpu.h

> +++ b/target/arm/cpu.h

> @@ -3723,8 +3723,8 @@ static inline bool isar_feature_aa64_pmu_8_1(const ARMISARegisters *id)

>   

>   static inline bool isar_feature_aa64_pmu_8_4(const ARMISARegisters *id)

>   {

> -    return FIELD_EX32(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 5 &&

> -        FIELD_EX32(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf;

> +    return FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 5 &&

> +        FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf;

>   }

>   

>   /*

> 


Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Richard Henderson Feb. 24, 2020, 6:23 p.m. UTC | #2
On 2/24/20 9:28 AM, Peter Maydell wrote:
> We missed an instance of using FIELD_EX32 on a 64-bit ID

> register, in isar_feature_aa64_pmu_8_4(). Fix it.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

> ---

>  target/arm/cpu.h | 4 ++--

>  1 file changed, 2 insertions(+), 2 deletions(-)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>



r~
diff mbox series

Patch

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 65171cb30ee..b647d8df916 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3723,8 +3723,8 @@  static inline bool isar_feature_aa64_pmu_8_1(const ARMISARegisters *id)
 
 static inline bool isar_feature_aa64_pmu_8_4(const ARMISARegisters *id)
 {
-    return FIELD_EX32(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 5 &&
-        FIELD_EX32(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf;
+    return FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 5 &&
+        FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf;
 }
 
 /*