| Message ID | 20200225031414.15649-1-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/arm: Misc cleanups surrounding TBI | expand |
On Tue, 25 Feb 2020 at 03:14, Richard Henderson <richard.henderson@linaro.org> wrote: > > We now cache the core mmu_idx in env->hflags. Rather than recompute > from scratch, extract the field. All of the uses of cpu_mmu_index > within target/arm are within helpers where env->hflags is stable. Do you mean "within helpers, and env->hflags is always stable in a helper", or "within helpers, and env->hflags is stable for the particular set of helpers where we use cpu_mmu_index, though it might not be in other helpers" ? thanks -- PMM
On 3/2/20 4:03 AM, Peter Maydell wrote: > On Tue, 25 Feb 2020 at 03:14, Richard Henderson > <richard.henderson@linaro.org> wrote: >> >> We now cache the core mmu_idx in env->hflags. Rather than recompute >> from scratch, extract the field. All of the uses of cpu_mmu_index >> within target/arm are within helpers where env->hflags is stable. > > Do you mean "within helpers, and env->hflags is always stable in > a helper", or "within helpers, and env->hflags is stable for the > particular set of helpers where we use cpu_mmu_index, though it might > not be in other helpers" ? The former. With the caveat that it's pretty clear when a helper is doing things that make it the exception to that rule. E.g. helper_exception_return, which itself invokes rebuild_hflags. r~
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 65171cb30e..0e53cc255e 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2939,16 +2939,6 @@ typedef enum ARMMMUIdxBit { #define MMU_USER_IDX 0 -/** - * cpu_mmu_index: - * @env: The cpu environment - * @ifetch: True for code access, false for data access. - * - * Return the core mmu index for the current translation regime. - * This function is used by generic TCG code paths. - */ -int cpu_mmu_index(CPUARMState *env, bool ifetch); - /* Indexes used when registering address spaces with cpu_address_space_init */ typedef enum ARMASIdx { ARMASIdx_NS = 0, @@ -3228,6 +3218,19 @@ FIELD(TBFLAG_A64, BTYPE, 10, 2) /* Not cached. */ FIELD(TBFLAG_A64, TBID, 12, 2) FIELD(TBFLAG_A64, UNPRIV, 14, 1) +/** + * cpu_mmu_index: + * @env: The cpu environment + * @ifetch: True for code access, false for data access. + * + * Return the core mmu index for the current translation regime. + * This function is used by generic TCG code paths. + */ +static inline int cpu_mmu_index(CPUARMState *env, bool ifetch) +{ + return FIELD_EX32(env->hflags, TBFLAG_ANY, MMUIDX); +} + static inline bool bswap_code(bool sctlr_b) { #ifdef CONFIG_USER_ONLY diff --git a/target/arm/helper.c b/target/arm/helper.c index c1dae83700..7cf6642210 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -12109,11 +12109,6 @@ ARMMMUIdx arm_mmu_idx(CPUARMState *env) return arm_mmu_idx_el(env, arm_current_el(env)); } -int cpu_mmu_index(CPUARMState *env, bool ifetch) -{ - return arm_to_core_mmu_idx(arm_mmu_idx(env)); -} - #ifndef CONFIG_USER_ONLY ARMMMUIdx arm_stage1_mmu_idx(CPUARMState *env) {
We now cache the core mmu_idx in env->hflags. Rather than recompute from scratch, extract the field. All of the uses of cpu_mmu_index within target/arm are within helpers where env->hflags is stable. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/cpu.h | 23 +++++++++++++---------- target/arm/helper.c | 5 ----- 2 files changed, 13 insertions(+), 15 deletions(-) -- 2.20.1