[5/7] dt-bindings: arm: Fixup the DT bindings for hierarchical PSCI states

Message ID 20200303150749.30566-6-ulf.hansson@linaro.org
State Accepted
Commit d2334a91a3b01dce4f290b4536fcfa4b9e923a3d
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Series
  • dt-bindings: arm: Fix bindings used for hierarchical PSCI states
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Commit Message

Ulf Hansson March 3, 2020, 3:07 p.m.
The hierarchical topology with power-domain should be described through
child nodes, rather than as currently described in the PSCI root node. Fix
this by adding a patternProperties with a corresponding reference to the
power-domain DT binding.

Additionally, update the example to conform to the new pattern, but also to
the adjusted domain-idle-state DT binding.

Fixes: a3f048b5424e ("dt: psci: Update DT bindings to support hierarchical PSCI states")
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

---
 .../devicetree/bindings/arm/psci.yaml         | 33 +++++++++----------
 1 file changed, 15 insertions(+), 18 deletions(-)

-- 
2.20.1

Comments

Rob Herring March 3, 2020, 5:06 p.m. | #1
On Tue, Mar 03, 2020 at 04:07:47PM +0100, Ulf Hansson wrote:
> The hierarchical topology with power-domain should be described through
> child nodes, rather than as currently described in the PSCI root node. Fix
> this by adding a patternProperties with a corresponding reference to the
> power-domain DT binding.
> 
> Additionally, update the example to conform to the new pattern, but also to
> the adjusted domain-idle-state DT binding.
> 
> Fixes: a3f048b5424e ("dt: psci: Update DT bindings to support hierarchical PSCI states")
> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
> ---
>  .../devicetree/bindings/arm/psci.yaml         | 33 +++++++++----------
>  1 file changed, 15 insertions(+), 18 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml
> index 0bc3c43a525a..cae668b61265 100644
> --- a/Documentation/devicetree/bindings/arm/psci.yaml
> +++ b/Documentation/devicetree/bindings/arm/psci.yaml
> @@ -102,11 +102,15 @@ properties:
>        [1] Kernel documentation - ARM idle states bindings
>          Documentation/devicetree/bindings/arm/idle-states.yaml
>  
> -  "#power-domain-cells":
> -    description:
> -      The number of cells in a PM domain specifier as per binding in [3].
> -      Must be 0 as to represent a single PM domain.
> +required:
> +  - compatible
> +  - method

No need to move this.

>  
> +patternProperties:
> +  "^(power-controller|power-domain)([@-].*)?$":
> +    $ref: "../power/power-domain.yaml#"

This has to be under an 'allOf' or the rest of the properties are 
ignored.

> +    type: object
> +    description: |
>        ARM systems can have multiple cores, sometimes in an hierarchical
>        arrangement. This often, but not always, maps directly to the processor
>        power topology of the system. Individual nodes in a topology have their
> @@ -122,19 +126,9 @@ properties:
>        helps to implement support for OSI mode and OS implementations may choose
>        to mandate it.
>  
> -      [3] Documentation/devicetree/bindings/power/power_domain.txt
> +      [3] Documentation/devicetree/bindings/power/power-domain.yaml
>        [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml
>  
> -  power-domains:
> -    $ref: '/schemas/types.yaml#/definitions/phandle-array'
> -    description:
> -      List of phandles and PM domain specifiers, as defined by bindings of the
> -      PM domain provider.
> -
> -required:
> -  - compatible
> -  - method
> -
>  allOf:
>    - if:
>        properties:
> @@ -224,6 +218,9 @@ examples:
>            exit-latency-us = <10>;
>            min-residency-us = <100>;
>          };
> +      };
> +
> +      domain-idle-states {
>  
>          CLUSTER_RET: cluster-retention {
>            compatible = "domain-idle-state";
> @@ -247,19 +244,19 @@ examples:
>        compatible = "arm,psci-1.0";
>        method = "smc";
>  
> -      CPU_PD0: cpu-pd0 {
> +      CPU_PD0: power-domain-cpu0 {
>          #power-domain-cells = <0>;
>          domain-idle-states = <&CPU_PWRDN>;
>          power-domains = <&CLUSTER_PD>;
>        };
>  
> -      CPU_PD1: cpu-pd1 {
> +      CPU_PD1: power-domain-cpu1 {
>          #power-domain-cells = <0>;
>          domain-idle-states =  <&CPU_PWRDN>;
>          power-domains = <&CLUSTER_PD>;
>        };
>  
> -      CLUSTER_PD: cluster-pd {
> +      CLUSTER_PD: power-domain-cluster {
>          #power-domain-cells = <0>;
>          domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
>        };
> -- 
> 2.20.1
>

Patch

diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml
index 0bc3c43a525a..cae668b61265 100644
--- a/Documentation/devicetree/bindings/arm/psci.yaml
+++ b/Documentation/devicetree/bindings/arm/psci.yaml
@@ -102,11 +102,15 @@  properties:
       [1] Kernel documentation - ARM idle states bindings
         Documentation/devicetree/bindings/arm/idle-states.yaml
 
-  "#power-domain-cells":
-    description:
-      The number of cells in a PM domain specifier as per binding in [3].
-      Must be 0 as to represent a single PM domain.
+required:
+  - compatible
+  - method
 
+patternProperties:
+  "^(power-controller|power-domain)([@-].*)?$":
+    $ref: "../power/power-domain.yaml#"
+    type: object
+    description: |
       ARM systems can have multiple cores, sometimes in an hierarchical
       arrangement. This often, but not always, maps directly to the processor
       power topology of the system. Individual nodes in a topology have their
@@ -122,19 +126,9 @@  properties:
       helps to implement support for OSI mode and OS implementations may choose
       to mandate it.
 
-      [3] Documentation/devicetree/bindings/power/power_domain.txt
+      [3] Documentation/devicetree/bindings/power/power-domain.yaml
       [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml
 
-  power-domains:
-    $ref: '/schemas/types.yaml#/definitions/phandle-array'
-    description:
-      List of phandles and PM domain specifiers, as defined by bindings of the
-      PM domain provider.
-
-required:
-  - compatible
-  - method
-
 allOf:
   - if:
       properties:
@@ -224,6 +218,9 @@  examples:
           exit-latency-us = <10>;
           min-residency-us = <100>;
         };
+      };
+
+      domain-idle-states {
 
         CLUSTER_RET: cluster-retention {
           compatible = "domain-idle-state";
@@ -247,19 +244,19 @@  examples:
       compatible = "arm,psci-1.0";
       method = "smc";
 
-      CPU_PD0: cpu-pd0 {
+      CPU_PD0: power-domain-cpu0 {
         #power-domain-cells = <0>;
         domain-idle-states = <&CPU_PWRDN>;
         power-domains = <&CLUSTER_PD>;
       };
 
-      CPU_PD1: cpu-pd1 {
+      CPU_PD1: power-domain-cpu1 {
         #power-domain-cells = <0>;
         domain-idle-states =  <&CPU_PWRDN>;
         power-domains = <&CLUSTER_PD>;
       };
 
-      CLUSTER_PD: cluster-pd {
+      CLUSTER_PD: power-domain-cluster {
         #power-domain-cells = <0>;
         domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
       };