diff mbox series

[for-5.0] tcg/i386: Fix %r12 guest_base initialization

Message ID 20200406174803.8192-1-richard.henderson@linaro.org
State Superseded
Headers show
Series [for-5.0] tcg/i386: Fix %r12 guest_base initialization | expand

Commit Message

Richard Henderson April 6, 2020, 5:48 p.m. UTC
When %gs cannot be used, we use register offset addressing.
This path is almost never used, so it was clearly not tested.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tcg/i386/tcg-target.inc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.20.1

Comments

Alex Bennée April 6, 2020, 6:13 p.m. UTC | #1
Richard Henderson <richard.henderson@linaro.org> writes:

> When %gs cannot be used, we use register offset addressing.

> This path is almost never used, so it was clearly not tested.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

Tested-by: Alex Bennée <alex.bennee@linaro.org>


> ---

>  tcg/i386/tcg-target.inc.c | 2 +-

>  1 file changed, 1 insertion(+), 1 deletion(-)

>

> diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c

> index 7f61eeedd0..ec083bddcf 100644

> --- a/tcg/i386/tcg-target.inc.c

> +++ b/tcg/i386/tcg-target.inc.c

> @@ -3737,7 +3737,7 @@ static void tcg_target_qemu_prologue(TCGContext *s)

>          } else {

>              /* Choose R12 because, as a base, it requires a SIB byte. */

>              x86_guest_base_index = TCG_REG_R12;

> -            tcg_out_mov(s, TCG_TYPE_PTR, x86_guest_base_index, guest_base);

> +            tcg_out_movi(s, TCG_TYPE_PTR, x86_guest_base_index, guest_base);

>              tcg_regset_set_reg(s->reserved_regs, x86_guest_base_index);

>          }

>      }



-- 
Alex Bennée
diff mbox series

Patch

diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 7f61eeedd0..ec083bddcf 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386/tcg-target.inc.c
@@ -3737,7 +3737,7 @@  static void tcg_target_qemu_prologue(TCGContext *s)
         } else {
             /* Choose R12 because, as a base, it requires a SIB byte. */
             x86_guest_base_index = TCG_REG_R12;
-            tcg_out_mov(s, TCG_TYPE_PTR, x86_guest_base_index, guest_base);
+            tcg_out_movi(s, TCG_TYPE_PTR, x86_guest_base_index, guest_base);
             tcg_regset_set_reg(s->reserved_regs, x86_guest_base_index);
         }
     }