[2/3] tcg/s390: Merge TCG_AREG0 and TCG_REG_CALL_STACK into TCGReg

Message ID 20200508155745.8223-3-richard.henderson@linaro.org
State New
Headers show
Series
  • tcg/s390: Support host vector operations
Related show

Commit Message

Richard Henderson May 8, 2020, 3:57 p.m.
They are rightly values in the same enumeration.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tcg/s390/tcg-target.h | 28 +++++++---------------------
 1 file changed, 7 insertions(+), 21 deletions(-)

-- 
2.20.1

Comments

David Hildenbrand May 11, 2020, 9:58 a.m. | #1
On 08.05.20 17:57, Richard Henderson wrote:
> They are rightly values in the same enumeration.

> 

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  tcg/s390/tcg-target.h | 28 +++++++---------------------

>  1 file changed, 7 insertions(+), 21 deletions(-)

> 

> diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h

> index 7ca48457ff..1e67c90ed2 100644

> --- a/tcg/s390/tcg-target.h

> +++ b/tcg/s390/tcg-target.h

> @@ -29,22 +29,13 @@

>  #define TCG_TARGET_TLB_DISPLACEMENT_BITS 19

>  

>  typedef enum TCGReg {

> -    TCG_REG_R0 = 0,

> -    TCG_REG_R1,

> -    TCG_REG_R2,

> -    TCG_REG_R3,

> -    TCG_REG_R4,

> -    TCG_REG_R5,

> -    TCG_REG_R6,

> -    TCG_REG_R7,

> -    TCG_REG_R8,

> -    TCG_REG_R9,

> -    TCG_REG_R10,

> -    TCG_REG_R11,

> -    TCG_REG_R12,

> -    TCG_REG_R13,

> -    TCG_REG_R14,

> -    TCG_REG_R15

> +    TCG_REG_R0,  TCG_REG_R1,  TCG_REG_R2,  TCG_REG_R3,

> +    TCG_REG_R4,  TCG_REG_R5,  TCG_REG_R6,  TCG_REG_R7,

> +    TCG_REG_R8,  TCG_REG_R9,  TCG_REG_R10, TCG_REG_R11,

> +    TCG_REG_R12, TCG_REG_R13, TCG_REG_R14, TCG_REG_R15,

> +

> +    TCG_AREG0 = TCG_REG_R10,

> +    TCG_REG_CALL_STACK = TCG_REG_R15

>  } TCGReg;

>  

>  #define TCG_TARGET_NB_REGS 16

> @@ -135,7 +126,6 @@ extern uint64_t s390_facilities[1];

>  #define TCG_TARGET_HAS_mulsh_i64      0

>  

>  /* used for function call generation */

> -#define TCG_REG_CALL_STACK		TCG_REG_R15

>  #define TCG_TARGET_STACK_ALIGN		8

>  #define TCG_TARGET_CALL_STACK_OFFSET	160

>  

> @@ -144,10 +134,6 @@ extern uint64_t s390_facilities[1];

>  

>  #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)

>  

> -enum {

> -    TCG_AREG0 = TCG_REG_R10,

> -};

> -

>  static inline void flush_icache_range(uintptr_t start, uintptr_t stop)

>  {

>  }

> 


Reviewed-by: David Hildenbrand <david@redhat.com>


-- 
Thanks,

David / dhildenb

Patch

diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index 7ca48457ff..1e67c90ed2 100644
--- a/tcg/s390/tcg-target.h
+++ b/tcg/s390/tcg-target.h
@@ -29,22 +29,13 @@ 
 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 19
 
 typedef enum TCGReg {
-    TCG_REG_R0 = 0,
-    TCG_REG_R1,
-    TCG_REG_R2,
-    TCG_REG_R3,
-    TCG_REG_R4,
-    TCG_REG_R5,
-    TCG_REG_R6,
-    TCG_REG_R7,
-    TCG_REG_R8,
-    TCG_REG_R9,
-    TCG_REG_R10,
-    TCG_REG_R11,
-    TCG_REG_R12,
-    TCG_REG_R13,
-    TCG_REG_R14,
-    TCG_REG_R15
+    TCG_REG_R0,  TCG_REG_R1,  TCG_REG_R2,  TCG_REG_R3,
+    TCG_REG_R4,  TCG_REG_R5,  TCG_REG_R6,  TCG_REG_R7,
+    TCG_REG_R8,  TCG_REG_R9,  TCG_REG_R10, TCG_REG_R11,
+    TCG_REG_R12, TCG_REG_R13, TCG_REG_R14, TCG_REG_R15,
+
+    TCG_AREG0 = TCG_REG_R10,
+    TCG_REG_CALL_STACK = TCG_REG_R15
 } TCGReg;
 
 #define TCG_TARGET_NB_REGS 16
@@ -135,7 +126,6 @@  extern uint64_t s390_facilities[1];
 #define TCG_TARGET_HAS_mulsh_i64      0
 
 /* used for function call generation */
-#define TCG_REG_CALL_STACK		TCG_REG_R15
 #define TCG_TARGET_STACK_ALIGN		8
 #define TCG_TARGET_CALL_STACK_OFFSET	160
 
@@ -144,10 +134,6 @@  extern uint64_t s390_facilities[1];
 
 #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
 
-enum {
-    TCG_AREG0 = TCG_REG_R10,
-};
-
 static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
 {
 }