[v7,14/42] target/arm: Add helper_probe_access

Message ID 20200603011317.473934-15-richard.henderson@linaro.org
State New
Headers show
Series
  • [v7,01/42] target/arm: Add isar tests for mte
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Commit Message

Richard Henderson June 3, 2020, 1:12 a.m.
Raise an exception if the given virtual memory is not accessible.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/helper.h        |  2 ++
 target/arm/op_helper.c     | 16 ++++++++++++++++
 target/arm/translate-a64.c | 13 +++++++++++++
 3 files changed, 31 insertions(+)

-- 
2.25.1

Comments

Peter Maydell June 18, 2020, 1:33 p.m. | #1
On Wed, 3 Jun 2020 at 02:13, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> Raise an exception if the given virtual memory is not accessible.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---


> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c

> index 0ee2ef403e..b032829194 100644

> --- a/target/arm/translate-a64.c

> +++ b/target/arm/translate-a64.c

> @@ -232,6 +232,19 @@ static void gen_address_with_allocation_tag0(TCGv_i64 dst, TCGv_i64 src)

>      tcg_gen_andi_i64(dst, src, ~MAKE_64BIT_MASK(56, 4));

>  }

>

> +static void gen_probe_access(DisasContext *s, TCGv_i64 ptr,

> +                             MMUAccessType acc, int log2_size)

> +{

> +    TCGv_i32 t_acc = tcg_const_i32(acc);

> +    TCGv_i32 t_idx = tcg_const_i32(get_mem_index(s));

> +    TCGv_i32 t_size = tcg_const_i32(1 << log2_size);

> +

> +    gen_helper_probe_access(cpu_env, ptr, t_acc, t_idx, t_size);

> +    tcg_temp_free_i32(t_acc);

> +    tcg_temp_free_i32(t_idx);

> +    tcg_temp_free_i32(t_size);

> +}


This isn't called from anywhere -- clang is probably going to
complain about that.

thanks
-- PMM
Richard Henderson June 18, 2020, 7:19 p.m. | #2
On 6/18/20 6:33 AM, Peter Maydell wrote:
> On Wed, 3 Jun 2020 at 02:13, Richard Henderson

> <richard.henderson@linaro.org> wrote:

>>

>> Raise an exception if the given virtual memory is not accessible.

>>

>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

>> ---

> 

>> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c

>> index 0ee2ef403e..b032829194 100644

>> --- a/target/arm/translate-a64.c

>> +++ b/target/arm/translate-a64.c

>> @@ -232,6 +232,19 @@ static void gen_address_with_allocation_tag0(TCGv_i64 dst, TCGv_i64 src)

>>      tcg_gen_andi_i64(dst, src, ~MAKE_64BIT_MASK(56, 4));

>>  }

>>

>> +static void gen_probe_access(DisasContext *s, TCGv_i64 ptr,

>> +                             MMUAccessType acc, int log2_size)

>> +{

>> +    TCGv_i32 t_acc = tcg_const_i32(acc);

>> +    TCGv_i32 t_idx = tcg_const_i32(get_mem_index(s));

>> +    TCGv_i32 t_size = tcg_const_i32(1 << log2_size);

>> +

>> +    gen_helper_probe_access(cpu_env, ptr, t_acc, t_idx, t_size);

>> +    tcg_temp_free_i32(t_acc);

>> +    tcg_temp_free_i32(t_idx);

>> +    tcg_temp_free_i32(t_size);

>> +}

> 

> This isn't called from anywhere -- clang is probably going to

> complain about that.


Ah, yes.  I thought it would be helpful to split this patch, but I guess not.
I'll merge with the next patch where it's used.

r~

Patch

diff --git a/target/arm/helper.h b/target/arm/helper.h
index 49336dc432..4b64d1ebd3 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -96,6 +96,8 @@  DEF_HELPER_FLAGS_1(rebuild_hflags_a32_newel, TCG_CALL_NO_RWG, void, env)
 DEF_HELPER_FLAGS_2(rebuild_hflags_a32, TCG_CALL_NO_RWG, void, env, int)
 DEF_HELPER_FLAGS_2(rebuild_hflags_a64, TCG_CALL_NO_RWG, void, env, int)
 
+DEF_HELPER_FLAGS_5(probe_access, TCG_CALL_NO_WG, void, env, tl, i32, i32, i32)
+
 DEF_HELPER_1(vfp_get_fpscr, i32, env)
 DEF_HELPER_2(vfp_set_fpscr, void, env, i32)
 
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index eb0de080f1..b1065216b2 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -935,3 +935,19 @@  uint32_t HELPER(ror_cc)(CPUARMState *env, uint32_t x, uint32_t i)
         return ((uint32_t)x >> shift) | (x << (32 - shift));
     }
 }
+
+void HELPER(probe_access)(CPUARMState *env, target_ulong ptr,
+                          uint32_t access_type, uint32_t mmu_idx,
+                          uint32_t size)
+{
+    uint32_t in_page = -((uint32_t)ptr | TARGET_PAGE_SIZE);
+    uintptr_t ra = GETPC();
+
+    if (likely(size <= in_page)) {
+        probe_access(env, ptr, size, access_type, mmu_idx, ra);
+    } else {
+        probe_access(env, ptr, in_page, access_type, mmu_idx, ra);
+        probe_access(env, ptr + in_page, size - in_page,
+                     access_type, mmu_idx, ra);
+    }
+}
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 0ee2ef403e..b032829194 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -232,6 +232,19 @@  static void gen_address_with_allocation_tag0(TCGv_i64 dst, TCGv_i64 src)
     tcg_gen_andi_i64(dst, src, ~MAKE_64BIT_MASK(56, 4));
 }
 
+static void gen_probe_access(DisasContext *s, TCGv_i64 ptr,
+                             MMUAccessType acc, int log2_size)
+{
+    TCGv_i32 t_acc = tcg_const_i32(acc);
+    TCGv_i32 t_idx = tcg_const_i32(get_mem_index(s));
+    TCGv_i32 t_size = tcg_const_i32(1 << log2_size);
+
+    gen_helper_probe_access(cpu_env, ptr, t_acc, t_idx, t_size);
+    tcg_temp_free_i32(t_acc);
+    tcg_temp_free_i32(t_idx);
+    tcg_temp_free_i32(t_size);
+}
+
 typedef struct DisasCompare64 {
     TCGCond cond;
     TCGv_i64 value;