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[aarch64-port-dev] Problematic frame: ~BufferBlob::InlineCacheBuffer

Message ID 1378475667.1845.11.camel@fleetfoot.lan
State Accepted
Headers show

Commit Message

Edward Nevill Sept. 6, 2013, 1:54 p.m. UTC 
On Thu, 2013-09-05 at 20:02 -0700, Cao Hoang Thu wrote:
> I only run test SPECjvm2008, it always happen this issue
> 
> #
> # A fatal error has been detected by the Java Runtime Environment:
> #
> #  SIGILL (0x4) at pc=0x0000007f720b3120, pid=1798, tid=547509223952
> #
> # JRE version: OpenJDK Runtime Environment (8.0) (build 1.8.0-internal-thcao_2013_09_05_09_35-b00)
> # Java VM: OpenJDK 64-Bit Client VM (25.0-b22 mixed mode linux-aarch64 )
> # Problematic frame:
> # v  ~BufferBlob::InlineCacheBuffer
> #

Dear Cao Hoang Thu,

I have managed to replicate this problem, but only when using the RTSM model which models the I cache and D cache behaviour rather than the foundation model.

The patch below should fix this problem.

Ed.

--- CUT HERE ---
exporting patch:
# HG changeset patch
# User Edward Nevill edward.nevill@linaro.org
# Date 1378474791 -3600
#      Fri Sep 06 14:39:51 2013 +0100
# Node ID 49648b3f8a17289d275a5291cb7364ca89261310
# Parent  6cb0224e9626d3767fe96bd05b55fda2a350b17e
Fix ICache flusing problem found in RTSM

Comments

Andrew Haley Sept. 6, 2013, 9:23 p.m. UTC | #1 
On 09/06/2013 02:54 PM, Edward Nevill wrote:
> The patch below should fix this problem.

Thanks, Ed.

Andrew.
Cao Hoang Thu Sept. 6, 2013, 11:39 p.m. UTC | #2 
Thanks everybody, I will check it today.


Regards,
Thu Cao

On 07-09-2013, at 04:23, Andrew Haley <aph@redhat.com> wrote:

> On 09/06/2013 02:54 PM, Edward Nevill wrote:
>> The patch below should fix this problem.
> 
> Thanks, Ed.
> 
> Andrew.
diff mbox

Patch

diff -r 6cb0224e9626 -r 49648b3f8a17 src/cpu/aarch64/vm/icBuffer_aarch64.cpp
--- a/src/cpu/aarch64/vm/icBuffer_aarch64.cpp	Thu Sep 05 18:16:19 2013 +0100
+++ b/src/cpu/aarch64/vm/icBuffer_aarch64.cpp	Fri Sep 06 14:39:51 2013 +0100
@@ -55,6 +55,8 @@ 
   masm->b(ExternalAddress(entry_point));
   masm->bind(l);
   masm->emit_int64((int64_t)cached_value);
+  // Only need to invalidate the 1st two instructions - not the whole ic stub
+  ICache::invalidate_range(code_begin, NativeInstruction::instruction_size * 2);
   0;
 }
 
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