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[203.254.224.24]) by mx.google.com with ESMTP id qc9si34477026pac.327.1969.12.31.16.00.00; Thu, 10 Oct 2013 01:07:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.24 as permitted sender) client-ip=203.254.224.24; Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MUG00CDZ18JAGL0@mailout1.samsung.com>; Thu, 10 Oct 2013 17:07:32 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.122]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 85.13.17682.34066525; Thu, 10 Oct 2013 17:07:31 +0900 (KST) X-AuditID: cbfee68e-b7f756d000004512-ba-525660433e0b Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id AE.11.05832.34066525; Thu, 10 Oct 2013 17:07:31 +0900 (KST) Received: from localhost.localdomain.com ([107.108.73.95]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MUG00FEY18BC940@mmp1.samsung.com>; Thu, 10 Oct 2013 17:07:31 +0900 (KST) From: Rajeshwari S Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org, u-boot-review@google.com, panto@antoniou-consulting.com, alim.akhtar@samsung.com Subject: [PATCH 02/10 V5] Exynos5420: Add base addresses for 5420 Date: Thu, 10 Oct 2013 13:39:01 +0530 Message-id: <1381392549-24686-3-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.11.7 In-reply-to: <1381392549-24686-1-git-send-email-rajeshwari.s@samsung.com> References: <1381392549-24686-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpgkeLIzCtJLcpLzFFi42JZI2JSpeucEBZkcKRLxOLBvG1sFg/X32Sx 6DjSwmix6/ZkFosph7+wWHzbso3RYvnrjewWb/d2sjtweMz7OZHJY3bDRRaPBZtKPe5c28Pm cfbODkaPvi2rGAPYorhsUlJzMstSi/TtErgyDv7uYSrol63Y/WgeYwPjc4kuRk4OCQETiXk/ zrFB2GISF+6tB7K5OIQEljJKvPm0gw2maP363cwQiUWMEq1LX0JVdTFJTO5oYO1i5OBgA6ra eCIBpEFEQELiV/9VRhCbWWADo8ScX9wgtrCAo8SSFyeYQWwWAVWJ8xchFvAKeEgcbJzKBLFM UWLGkmdgvZwCnhI7Nm4EqxECqlnXtJ8VZK+EwCp2iTsvN7NBDBKQ+Db5EAvIDRICshKbDjBD zJGUOLjiBssERuEFjAyrGEVTC5ILipPSi4z0ihNzi0vz0vWS83M3MQJD//S/Z307GG8esD7E mAw0biKzlGhyPjB28kriDY3NjCxMTUyNjcwtzUgTVhLnVWuxDhQSSE8sSc1OTS1ILYovKs1J LT7EyMTBKdXAaDpnXn2yf3D2klzH8tYPZ+V1JK8cm763M7to+iHRA/8UQj/1ayQq7l/ekZmm G8rXIrG+wSZkop2k88T3ie53mb8vfH7+4nbRctP+G4rnjDTvP53jVhw5bX7GETtVr0sbZZas Pji5PjhthSR72ApH9qVel4ybPtmzzX9l4PHh72GfNMatN4UWKLEUZyQaajEXFScCALUlibeT AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLIsWRmVeSWpSXmKPExsVy+t9jAV3nhLAggx3neSwezNvGZvFw/U0W i44jLYwWu25PZrGYcvgLi8W3LdsYLZa/3shu8XZvJ7sDh8e8nxOZPGY3XGTxWLCp1OPOtT1s Hmfv7GD06NuyijGALaqB0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfV VsnFJ0DXLTMH6CIlhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY8bB3z1M Bf2yFbsfzWNsYHwu0cXIySEhYCKxfv1uZghbTOLCvfVsXYxcHEICixglWpe+hHK6mCQmdzSw djFycLABdWw8kQDSICIgIfGr/yojiM0ssIFRYs4vbhBbWMBRYsmLE2BDWQRUJc5f3MEGYvMK eEgcbJzKBLFMUWLGkmdgvZwCnhI7Nm4EqxECqlnXtJ91AiPvAkaGVYyiqQXJBcVJ6blGesWJ ucWleel6yfm5mxjBkfVMegfjqgaLQ4wCHIxKPLwVZaFBQqyJZcWVuYcYJTiYlUR4p58ECvGm JFZWpRblxxeV5qQWH2JMBrpqIrOUaHI+MOrzSuINjU3MTY1NLU0sTMwsSRNWEuc92GodKCSQ nliSmp2aWpBaBLOFiYNTqoHRtin8qlnXSWeB5HZTv/rPWxXenxUUDdjh/PpoqsbWKIXSee/5 Y/Smrrx/+dCOxWxfmOatMYvbryE3W5CH82bOtpf1Xk971ZoTz74O2aB67CkPRwDX6anT9gW+ WzNBW3/CQrbAoMe3Vs48qLFyk+VCriMTRD2DOQ30wj7EVzy7+fvv46jMpafClViKMxINtZiL ihMBleh7Z/ACAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rajeshwari.s@samsung.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.46 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Adds base addresses of various IPs and controllers required for Exynos5420. Signed-off-by: Rajeshwari S Shinde Signed-off-by: Akshay Saraswat Acked-by: Simon Glass --- Changes in V2: - None Changes in V3: - None Changes in V4: - Added base address for TZPC. Changes in V5: - None arch/arm/include/asm/arch-exynos/cpu.h | 48 +++++++++++++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index cb924fb..a44c500 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -86,7 +86,7 @@ #define EXYNOS4X12_ACE_SFR_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4X12_DMC_PHY_BASE DEVICE_NOT_AVAILABLE -/* EXYNOS5 Common*/ +/* EXYNOS5 */ #define EXYNOS5_I2C_SPACING 0x10000 #define EXYNOS5_GPIO_PART4_BASE 0x03860000 @@ -121,6 +121,45 @@ #define EXYNOS5_ADC_BASE DEVICE_NOT_AVAILABLE #define EXYNOS5_MODEM_BASE DEVICE_NOT_AVAILABLE +/* EXYNOS5420 Common */ +#define EXYNOS5420_I2C_SPACING 0x10000 + +#define EXYNOS5420_GPIO_PART5_BASE 0x03860000 +#define EXYNOS5420_PRO_ID 0x10000000 +#define EXYNOS5420_CLOCK_BASE 0x10010000 +#define EXYNOS5420_POWER_BASE 0x10040000 +#define EXYNOS5420_SWRESET 0x10040400 +#define EXYNOS5420_SYSREG_BASE 0x10050000 +#define EXYNOS5420_TZPC_BASE 0x100E0000 +#define EXYNOS5420_WATCHDOG_BASE 0x101D0000 +#define EXYNOS5420_ACE_SFR_BASE 0x10830000 +#define EXYNOS5420_DMC_PHY_BASE 0x10C00000 +#define EXYNOS5420_DMC_CTRL_BASE 0x10C20000 +#define EXYNOS5420_DMC_TZASC0_BASE 0x10D40000 +#define EXYNOS5420_DMC_TZASC1_BASE 0x10D50000 +#define EXYNOS5420_USB_HOST_EHCI_BASE 0x12110000 +#define EXYNOS5420_MMC_BASE 0x12200000 +#define EXYNOS5420_SROMC_BASE 0x12250000 +#define EXYNOS5420_UART_BASE 0x12C00000 +#define EXYNOS5420_I2C_BASE 0x12C60000 +#define EXYNOS5420_I2C_8910_BASE 0x12E00000 +#define EXYNOS5420_SPI_BASE 0x12D20000 +#define EXYNOS5420_I2S_BASE 0x12D60000 +#define EXYNOS5420_PWMTIMER_BASE 0x12DD0000 +#define EXYNOS5420_SPI_ISP_BASE 0x131A0000 +#define EXYNOS5420_GPIO_PART2_BASE 0x13400000 +#define EXYNOS5420_GPIO_PART3_BASE 0x13410000 +#define EXYNOS5420_GPIO_PART4_BASE 0x14000000 +#define EXYNOS5420_GPIO_PART1_BASE 0x14010000 +#define EXYNOS5420_MIPI_DSIM_BASE 0x14500000 +#define EXYNOS5420_DP_BASE 0x145B0000 + +#define EXYNOS5420_USBPHY_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS5420_USBOTG_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS5420_FIMD_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS5420_ADC_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS5420_MODEM_BASE DEVICE_NOT_AVAILABLE + #ifndef __ASSEMBLY__ #include /* CPU detection macros */ @@ -154,6 +193,10 @@ static inline void s5p_set_cpu_id(void) /* Exynos5250 */ s5p_cpu_id = 0x5250; break; + case 0x420: + /* Exynos5420 */ + s5p_cpu_id = 0x5420; + break; } } @@ -181,6 +224,7 @@ static inline int __attribute__((no_instrument_function)) \ IS_EXYNOS_TYPE(exynos4210, 0x4210) IS_EXYNOS_TYPE(exynos4412, 0x4412) IS_EXYNOS_TYPE(exynos5250, 0x5250) +IS_EXYNOS_TYPE(exynos5420, 0x5420) #define SAMSUNG_BASE(device, base) \ static inline unsigned int __attribute__((no_instrument_function)) \ @@ -191,6 +235,8 @@ static inline unsigned int __attribute__((no_instrument_function)) \ return EXYNOS4X12_##base; \ return EXYNOS4_##base; \ } else if (cpu_is_exynos5()) { \ + if (proid_is_exynos5420()) \ + return EXYNOS5420_##base; \ return EXYNOS5_##base; \ } \ return 0; \