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[89.246.104.56]) by smtp.gmail.com with ESMTPSA id v27sm3714151wrv.81.2020.06.18.05.51.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Jun 2020 05:51:48 -0700 (PDT) From: Drew Fustini To: Tony Lindgren , Rob Herring , linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij , Haojian Zhuang , devicetree@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Cousson?= , Jason Kridner , Robert Nelson Cc: Drew Fustini Subject: [PATCH 2/3] ARM: dts: am33xx-l4: change #pinctrl-cells from 1 to 2 Date: Thu, 18 Jun 2020 14:50:56 +0200 Message-Id: <20200618125057.41252-3-drew@beagleboard.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200618125057.41252-1-drew@beagleboard.org> References: <20200618125057.41252-1-drew@beagleboard.org> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org This requires AM33XX_PADCONF macro in omap.h to be modified to keep pin conf and pin mux values separate. pinctrl-single.c must also be changed to support "pinctrl-single,pins" with 3 arguments (offset, conf, mux). Signed-off-by: Drew Fustini --- arch/arm/boot/dts/am33xx-l4.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi index 340ea331e54d..f9b99cfa93b6 100644 --- a/arch/arm/boot/dts/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/am33xx-l4.dtsi @@ -290,7 +290,7 @@ scm: scm@0 { am33xx_pinmux: pinmux@800 { compatible = "pinctrl-single"; reg = <0x800 0x238>; - #pinctrl-cells = <1>; + #pinctrl-cells = <2>; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0x7f>; };