From patchwork Mon Feb 24 23:20:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 211633 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99AB3C11D3D for ; Mon, 24 Feb 2020 23:28:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7908224649 for ; Mon, 24 Feb 2020 23:28:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728412AbgBXX2b (ORCPT ); Mon, 24 Feb 2020 18:28:31 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:60500 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728274AbgBXX2b (ORCPT ); Mon, 24 Feb 2020 18:28:31 -0500 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: sre) with ESMTPSA id 0E43B28A938 Received: by earth.universe (Postfix, from userid 1000) id 1ED443C0C9A; Tue, 25 Feb 2020 00:21:31 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Laurent Pinchart , Tomi Valkeinen Cc: Tony Lindgren , Merlijn Wajer , "H. Nikolaus Schaller" , Rob Herring , linux-omap@vger.kernel.org, dri-devel@lists.freedesktop.org, kernel@collabora.com, Sebastian Reichel Subject: [PATCHv2 23/56] drm/omap: dsi: use pixel-format and mode from attach Date: Tue, 25 Feb 2020 00:20:53 +0100 Message-Id: <20200224232126.3385250-24-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200224232126.3385250-1-sebastian.reichel@collabora.com> References: <20200224232126.3385250-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org In order to reduce the amount of custom functionality, this moves handling of pixel format and DSI mode from set_config() to dsi attach. Signed-off-by: Sebastian Reichel --- .../gpu/drm/omapdrm/displays/panel-dsi-cm.c | 2 -- drivers/gpu/drm/omapdrm/dss/dsi.c | 20 +++++++++++++------ 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c index a45df247aad1..199eac88a777 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c @@ -550,8 +550,6 @@ static int dsicm_power_on(struct panel_drv_data *ddata) u8 id1, id2, id3; int r; struct omap_dss_dsi_config dsi_config = { - .mode = OMAP_DSS_DSI_CMD_MODE, - .pixel_format = MIPI_DSI_FMT_RGB888, .vm = &ddata->vm, .hs_clk_min = 150000000, .hs_clk_max = 300000000, diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index 64407f4651af..6c625b6d6d6b 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c @@ -4583,18 +4583,19 @@ static int dsi_set_config(struct omap_dss_device *dssdev, { struct dsi_data *dsi = to_dsi_data(dssdev); struct dsi_clk_calc_ctx ctx; + struct omap_dss_dsi_config cfg = *config; bool ok; int r; mutex_lock(&dsi->lock); - dsi->pix_fmt = config->pixel_format; - dsi->mode = config->mode; + cfg.mode = dsi->mode; + cfg.pixel_format = dsi->pix_fmt; - if (config->mode == OMAP_DSS_DSI_VIDEO_MODE) - ok = dsi_vm_calc(dsi, config, &ctx); + if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) + ok = dsi_vm_calc(dsi, &cfg, &ctx); else - ok = dsi_cm_calc(dsi, config, &ctx); + ok = dsi_cm_calc(dsi, &cfg, &ctx); if (!ok) { DSSERR("failed to find suitable DSI clock settings\n"); @@ -4605,7 +4606,7 @@ static int dsi_set_config(struct omap_dss_device *dssdev, dsi_pll_calc_dsi_fck(dsi, &ctx.dsi_cinfo); r = dsi_lp_clock_calc(ctx.dsi_cinfo.clkout[HSDIV_DSI], - config->lp_clk_min, config->lp_clk_max, &dsi->user_lp_cinfo); + cfg.lp_clk_min, cfg.lp_clk_max, &dsi->user_lp_cinfo); if (r) { DSSERR("failed to find suitable DSI LP clock settings\n"); goto err; @@ -4784,6 +4785,13 @@ int omap_dsi_host_attach(struct mipi_dsi_host *host, } dsi->vc[channel].dest = client; + + dsi->pix_fmt = client->format; + if (client->mode_flags & MIPI_DSI_MODE_VIDEO) + dsi->mode = OMAP_DSS_DSI_VIDEO_MODE; + else + dsi->mode = OMAP_DSS_DSI_CMD_MODE; + return 0; }