From patchwork Sat Apr 11 12:33:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hyunki Koo X-Patchwork-Id: 213479 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3299C352BE for ; Sat, 11 Apr 2020 12:34:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 765C720CC7 for ; Sat, 11 Apr 2020 12:34:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OlXurp1n" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726188AbgDKMd5 (ORCPT ); Sat, 11 Apr 2020 08:33:57 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:37452 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726162AbgDKMd5 (ORCPT ); Sat, 11 Apr 2020 08:33:57 -0400 Received: by mail-pg1-f196.google.com with SMTP id r4so2178498pgg.4; Sat, 11 Apr 2020 05:33:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=gnw6hlk+JnnAj87CuNrSUZ8DpMu9l57IOqgjCT7NThc=; b=OlXurp1nngb6HV4qIscQm7g3d0p0GHvxpPFx5XmNz6FphwmcqtVOvbJBJaUTQHE1Lf aSAVsCp0taW7akeQXksXaqdHBo8w73aR4UboLqylyMevhhxVawvgdiZQrKaY1BoxcUeD 93QgubJL/IMPalI3IM80fbK/kP9GyN5BSNtO1MhIQzusYDtkYeVj2o9+kAFMvIMWi3mP eUME8ICdRmwHesJo9jjaNpB8CosoVSRJeZSHo94RMzCjDmeO9o6YFEcnd3jjiDysWpiv GbvEoOA6G/2BZBkE4KXzpM1fngOgiVQK5Uwg5fP/7+e1FVwq/TFFJQpUc9QuZukSevpq 22lw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=gnw6hlk+JnnAj87CuNrSUZ8DpMu9l57IOqgjCT7NThc=; b=Q9rUBoL09iEa3ln1me4Lu/sIoszd3q4jxsv78Z9cT6u42vBaEjckM3DuKAvErDXIl7 TxxBZ83RAfYa6tegDZBrhSs7eH+17SQsqRSOIkuM4FbuCluL0SryI96ZwJDTmXBAk1YN kDf0l+bkeaya3ZnN5VRinKylg+YT5lPvPSAhPGSJ/mIovc88nD5X4nBVXotg82z+uUmg jHXwbx6aFDRZ6Haye/8H25f5omN0o74mk8AlbnXL8dnCqlxD9/N4Q4I9mtBsCecdPBCO t1W1h67TLb7vTYAG1t+z4+5fJd1A3CsQpFacn4v7C4D2PMH9jdZhI65h+zUh2MwWm/V7 ELyA== X-Gm-Message-State: AGi0PubP2IWnwtbIrQ2Sgmaq7/+WxnlywOP5gQJ7IBWZM6Lq1wfd0Nn/ O425v+qg53futdHRxBDj77M= X-Google-Smtp-Source: APiQypK2cswsg3hnhBKAvsRfSomdnFscjCEBqO7552MoYZ5KejiCel1V/HmXMy8r6dIYqIUL8aAtmQ== X-Received: by 2002:a65:6449:: with SMTP id s9mr8439430pgv.97.1586608435226; Sat, 11 Apr 2020 05:33:55 -0700 (PDT) Received: from localhost.localdomain ([211.243.117.64]) by smtp.gmail.com with ESMTPSA id g2sm4117641pfh.193.2020.04.11.05.33.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Apr 2020 05:33:54 -0700 (PDT) From: Hyunki Koo To: gregkh@linuxfoundation.org, robh+dt@kernel.org, krzk@kernel.org Cc: Hyunki Koo , Kukjin Kim , Jiri Slaby , linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v7 2/2] Support 32-bit access for the TX/RX hold registers UTXH and URXH. Date: Sat, 11 Apr 2020 21:33:24 +0900 Message-Id: <20200411123325.30501-1-hyunki00.koo@gmail.com> X-Mailer: git-send-email 2.17.1 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org From: Hyunki Koo This is required for some newer SoCs. Signed-off-by: Hyunki Koo Reviewed-by: Krzysztof Kozlowski Tested on Odroid HC1 (Exynos5422): Tested-by: Krzysztof Kozlowski --- v2: line 954 : change rd_regl to rd_reg in for backward compatibility. line 2031: Add init value for ourport->port.iotype to UPIO_MEM v3: line 2031: remove redundant init value for ourport->port.iotype v4: correct variable types and change misleading function name v5: add dt-binding and go as first patch in this series. v6: no change in this patch, only chaged in [PATCH v6 1/2] v7: add reviewed by and tested by --- drivers/tty/serial/samsung_tty.c | 76 +++++++++++++++++++++++++++----- 1 file changed, 64 insertions(+), 12 deletions(-) diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index 73f951d65b93..bdf1d4d12cb1 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -154,12 +154,47 @@ struct s3c24xx_uart_port { #define portaddrl(port, reg) \ ((unsigned long *)(unsigned long)((port)->membase + (reg))) -#define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg))) +static u32 rd_reg(struct uart_port *port, u32 reg) +{ + switch (port->iotype) { + case UPIO_MEM: + return readb_relaxed(portaddr(port, reg)); + case UPIO_MEM32: + return readl_relaxed(portaddr(port, reg)); + default: + return 0; + } + return 0; +} + #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg))) -#define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, reg)) +static void wr_reg(struct uart_port *port, u32 reg, u32 val) +{ + switch (port->iotype) { + case UPIO_MEM: + writeb_relaxed(val, portaddr(port, reg)); + break; + case UPIO_MEM32: + writel_relaxed(val, portaddr(port, reg)); + break; + } +} + #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, reg)) +static void wr_reg_barrier(struct uart_port *port, u32 reg, u32 val) +{ + switch (port->iotype) { + case UPIO_MEM: + writeb(val, portaddr(port, reg)); + break; + case UPIO_MEM32: + writel(val, portaddr(port, reg)); + break; + } +} + /* Byte-order aware bit setting/clearing functions. */ static inline void s3c24xx_set_bit(struct uart_port *port, int idx, @@ -714,7 +749,7 @@ static void s3c24xx_serial_rx_drain_fifo(struct s3c24xx_uart_port *ourport) fifocnt--; uerstat = rd_regl(port, S3C2410_UERSTAT); - ch = rd_regb(port, S3C2410_URXH); + ch = rd_reg(port, S3C2410_URXH); if (port->flags & UPF_CONS_FLOW) { int txe = s3c24xx_serial_txempty_nofifo(port); @@ -826,7 +861,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) } if (port->x_char) { - wr_regb(port, S3C2410_UTXH, port->x_char); + wr_reg(port, S3C2410_UTXH, port->x_char); port->icount.tx++; port->x_char = 0; goto out; @@ -852,7 +887,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) break; - wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); + wr_reg(port, S3C2410_UTXH, xmit->buf[xmit->tail]); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); port->icount.tx++; count--; @@ -916,7 +951,7 @@ static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port) /* no modem control lines */ static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port) { - unsigned int umstat = rd_regb(port, S3C2410_UMSTAT); + unsigned int umstat = rd_reg(port, S3C2410_UMSTAT); if (umstat & S3C2410_UMSTAT_CTS) return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; @@ -1974,7 +2009,7 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct s3c24xx_uart_port *ourport; int index = probe_index; - int ret; + int ret, prop = 0; if (np) { ret = of_alias_get_id(np, "serial"); @@ -2000,10 +2035,27 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) dev_get_platdata(&pdev->dev) : ourport->drv_data->def_cfg; - if (np) + if (np) { of_property_read_u32(np, "samsung,uart-fifosize", &ourport->port.fifosize); + if (of_property_read_u32(np, "reg-io-width", &prop) == 0) { + switch (prop) { + case 1: + ourport->port.iotype = UPIO_MEM; + break; + case 4: + ourport->port.iotype = UPIO_MEM32; + break; + default: + dev_warn(&pdev->dev, "unsupported reg-io-width (%d)\n", + prop); + ret = -EINVAL; + break; + } + } + } + if (ourport->drv_data->fifosize[index]) ourport->port.fifosize = ourport->drv_data->fifosize[index]; else if (ourport->info->fifosize) @@ -2185,7 +2237,7 @@ static int s3c24xx_serial_get_poll_char(struct uart_port *port) if (s3c24xx_serial_rx_fifocnt(ourport, ufstat) == 0) return NO_POLL_CHAR; - return rd_regb(port, S3C2410_URXH); + return rd_reg(port, S3C2410_URXH); } static void s3c24xx_serial_put_poll_char(struct uart_port *port, @@ -2200,7 +2252,7 @@ static void s3c24xx_serial_put_poll_char(struct uart_port *port, while (!s3c24xx_serial_console_txrdy(port, ufcon)) cpu_relax(); - wr_regb(port, S3C2410_UTXH, c); + wr_reg(port, S3C2410_UTXH, c); } #endif /* CONFIG_CONSOLE_POLL */ @@ -2212,7 +2264,7 @@ s3c24xx_serial_console_putchar(struct uart_port *port, int ch) while (!s3c24xx_serial_console_txrdy(port, ufcon)) cpu_relax(); - wr_regb(port, S3C2410_UTXH, ch); + wr_reg(port, S3C2410_UTXH, ch); } static void @@ -2612,7 +2664,7 @@ static void samsung_early_putc(struct uart_port *port, int c) else samsung_early_busyuart(port); - writeb(c, port->membase + S3C2410_UTXH); + wr_reg_barrier(port, S3C2410_UTXH, c); } static void samsung_early_write(struct console *con, const char *s,