ARM: dts: exynos: Fix broken reboot on some Odroid U2/X2/U3 boards

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  • ARM: dts: exynos: Fix broken reboot on some Odroid U2/X2/U3 boards
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Commit Message

Marek Szyprowski Jan. 31, 2020, 10:37 a.m.
The bootloader on Odroid U2/X2/U3 boards configures main ARM clock to
1GHz. During the system shutdown procedure Linux kernel selects so called
'suspend-opp' for the CPU cores, what means that ARM clock is set to
800MHz and the CPU supply voltage is adjusted to that value. PMIC
configuration is preserved during the board reboot. Later when the
bootloader tries to enter the 1GHz mode, the voltage value configured by
the kernel might be not high enough for the CPU to operate stable. This
depends on the individual physical properties of each SoC (usually it is
related to the production series) and varies between the boards.
Typically most of the Odroid U3 boards work fine, while most of the U2
and X2 hangs during the reboot.

This commit switches suspend-opp to 1GHz for the Odroid U2/X2/U3 boards,
what finally fixes this issue.

Signed-off-by: Marek Szyprowski <>
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)


diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index ea55f377d17c..0126587c7fab 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -534,6 +534,15 @@ 
+&cpu0_opp_table {
+	opp-1000000000 {
+		opp-suspend;
+	};
+	opp-800000000 {
+		/delete-property/opp-suspend;
+	};
 &rtc {
 	status = "okay";
 	clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;