| Message ID | d995795c731d6ecceb36bdf1c1df3d72fefd023d.camel@marvell.com |
|---|---|
| State | New |
| Headers | show |
| Series | [01/13] task_isolation: vmstat: add quiet_vmstat_sync function | expand |
diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h index 83ae97c049d9..6def62c95937 100644 --- a/arch/arm/include/asm/barrier.h +++ b/arch/arm/include/asm/barrier.h @@ -64,12 +64,14 @@ extern void arm_heavy_mb(void); #define mb() __arm_heavy_mb() #define rmb() dsb() #define wmb() __arm_heavy_mb(st) +#define imb() isb() #define dma_rmb() dmb(osh) #define dma_wmb() dmb(oshst) #else #define mb() barrier() #define rmb() barrier() #define wmb() barrier() +#define imb() barrier() #define dma_rmb() barrier() #define dma_wmb() barrier() #endif diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h index 7d9cc5ec4971..12a7dbd68bed 100644 --- a/arch/arm64/include/asm/barrier.h +++ b/arch/arm64/include/asm/barrier.h @@ -45,6 +45,8 @@ #define rmb() dsb(ld) #define wmb() dsb(st) +#define imb() isb() + #define dma_rmb() dmb(oshld) #define dma_wmb() dmb(oshst) diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h index 85b28eb80b11..d5a822fb3e92 100644 --- a/include/asm-generic/barrier.h +++ b/include/asm-generic/barrier.h @@ -46,6 +46,10 @@ #define dma_wmb() wmb() #endif +#ifndef imb +#define imb barrier() +#endif + #ifndef read_barrier_depends #define read_barrier_depends() do { } while (0) #endif
Some architectures implement memory synchronization instructions for instruction cache. Make a separate kind of barrier that calls them. Signed-off-by: Alex Belits <abelits@marvell.com> --- arch/arm/include/asm/barrier.h | 2 ++ arch/arm64/include/asm/barrier.h | 2 ++ include/asm-generic/barrier.h | 4 ++++ 3 files changed, 8 insertions(+) -- 2.20.1