From patchwork Mon Feb 28 11:46:14 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aneesh V X-Patchwork-Id: 225 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:41:02 -0000 Delivered-To: patches@linaro.org Received: by 10.224.19.208 with SMTP id c16cs91644qab; Mon, 28 Feb 2011 03:46:28 -0800 (PST) Received: by 10.90.248.36 with SMTP id v36mr1347512agh.33.1298893588118; Mon, 28 Feb 2011 03:46:28 -0800 (PST) Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by mx.google.com with ESMTPS id g34si8117867anh.176.2011.02.28.03.46.27 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 28 Feb 2011 03:46:28 -0800 (PST) Received-SPF: pass (google.com: domain of aneesh@ti.com designates 192.94.94.40 as permitted sender) client-ip=192.94.94.40; Authentication-Results: mx.google.com; spf=pass (google.com: domain of aneesh@ti.com designates 192.94.94.40 as permitted sender) smtp.mail=aneesh@ti.com Received: from dbdp31.itg.ti.com ([172.24.170.98]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id p1SBkOhP005385 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 28 Feb 2011 05:46:26 -0600 Received: from localhost (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p1SBkN3v011774; Mon, 28 Feb 2011 17:16:23 +0530 (IST) From: Aneesh V To: u-boot@lists.denx.de Cc: aneesh@ti.com, x-loader@googlegroups.com, patches@linaro.org, john.rigby@linaro.org Subject: [PATCH 05/22] omap4: save parameters passed by ROM code to SPL Date: Mon, 28 Feb 2011 17:16:14 +0530 Message-Id: <1298893591-17636-6-git-send-email-aneesh@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1298893591-17636-1-git-send-email-aneesh@ti.com> References: <1298893591-17636-1-git-send-email-aneesh@ti.com> Save boot device information passed by OMAP4 rom code ROM code in OMAP4 passes information such as the media from which it picked up the first boot image(SPL in our case), the mode(raw mode/FAT mode) etc. Save this information in SPL so that we can use the same media and mode to bootload u-boot. Signed-off-by: Aneesh V --- arch/arm/cpu/armv7/omap4/board.c | 14 ++++++++++++ arch/arm/cpu/armv7/omap4/lowlevel_init.S | 31 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-omap4/omap4.h | 8 +++++++ arch/arm/include/asm/arch-omap4/sys_proto.h | 1 + arch/arm/include/asm/omap_common.h | 20 +++++++++++++++++ 5 files changed, 74 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c index 7583a0d..a5d585b 100644 --- a/arch/arm/cpu/armv7/omap4/board.c +++ b/arch/arm/cpu/armv7/omap4/board.c @@ -35,6 +35,20 @@ DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_PRELOADER +u32 omap4_boot_device = BOOT_DEVICE_MMC1; +u32 omap4_boot_mode = MMCSD_MODE_FAT; +u32 omap_boot_device(void) +{ + return omap4_boot_device; +} + +u32 omap_boot_mode(void) +{ + return omap4_boot_mode; +} +#endif + /* * Routine: s_init * Description: Does early system init of muxing and clocks. diff --git a/arch/arm/cpu/armv7/omap4/lowlevel_init.S b/arch/arm/cpu/armv7/omap4/lowlevel_init.S index 026dfa4..250c73d 100644 --- a/arch/arm/cpu/armv7/omap4/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap4/lowlevel_init.S @@ -27,6 +27,37 @@ */ #include +#ifdef CONFIG_PRELOADER +.global save_boot_params +save_boot_params: + /* + * See if the rom code passed pointer is valid: + * It is not valid if it is not in non-secure SRAM + * This may happen if you are booting with the help of + * debugger + */ + ldr r2, =NON_SECURE_SRAM_START + cmp r2, r0 + bgt 1f + ldr r2, =NON_SECURE_SRAM_END + cmp r2, r0 + blt 1f + + /* Store the boot device in omap4_boot_device */ + ldr r2, [r0, #BOOT_DEVICE_OFFSET] @ r1 <- value of boot device + and r2, #BOOT_DEVICE_MASK + ldr r3, =omap4_boot_device + str r2, [r3] @ omap4_boot_device <- r1 + + /* Store the boot mode (raw/FAT) in omap4_boot_mode */ + ldr r2, [r0, #DEV_DESC_PTR_OFFSET] @ get the device descriptor ptr + ldr r2, [r2, #DEV_DATA_PTR_OFFSET] @ get the pDeviceData ptr + ldr r2, [r2, #BOOT_MODE_OFFSET] @ get the boot mode + ldr r3, =omap4_boot_mode + str r2, [r3] +1: + bx lr +#endif .globl lowlevel_init lowlevel_init: diff --git a/arch/arm/include/asm/arch-omap4/omap4.h b/arch/arm/include/asm/arch-omap4/omap4.h index 1f88732..740ca9d 100644 --- a/arch/arm/include/asm/arch-omap4/omap4.h +++ b/arch/arm/include/asm/arch-omap4/omap4.h @@ -133,4 +133,12 @@ struct s32ktimer { #define OMAP4430_ES2_1 3 #define OMAP4430_ES2_2 4 +/* ROM code defines */ +/* Boot device */ +#define BOOT_DEVICE_MASK 0xFF +#define BOOT_DEVICE_OFFSET 0x8 +#define DEV_DESC_PTR_OFFSET 0x4 +#define DEV_DATA_PTR_OFFSET 0x18 +#define BOOT_MODE_OFFSET 0x8 + #endif diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h index 4813e9e..ce86b36 100644 --- a/arch/arm/include/asm/arch-omap4/sys_proto.h +++ b/arch/arm/include/asm/arch-omap4/sys_proto.h @@ -23,6 +23,7 @@ #include #include +#include struct omap_sysinfo { char *board_string; diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 03db2f5..06c511c 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -48,4 +48,24 @@ (addr));\ } while (0); +/* Boot device */ +#define BOOT_DEVICE_NONE 0 +#define BOOT_DEVICE_XIP 1 +#define BOOT_DEVICE_XIPWAIT 2 +#define BOOT_DEVICE_NAND 3 +#define BOOT_DEVICE_ONE_NAND 4 +#define BOOT_DEVICE_MMC1 5 +#define BOOT_DEVICE_MMC2 6 + +/* Boot type */ +#define MMCSD_MODE_UNDEFINED 0 +#define MMCSD_MODE_RAW 1 +#define MMCSD_MODE_FAT 2 + +/* Magic number passed from SPL to U-Boot */ +#define OMAP_SPL_TO_UBOOT_MAGIC_NUMBER 0xDEADBEEF + +u32 omap_boot_device(void); +u32 omap_boot_mode(void); + #endif /* _OMAP_COMMON_H_ */