From patchwork Fri Jul 10 16:21:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 235254 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp603031ilg; Fri, 10 Jul 2020 09:26:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwTBoD1ttWLutGDPjcF/zIUIXiB89D/uhWnAX/dPADErkyhV/k0t9sCaGm73d53+O0dHH5j X-Received: by 2002:a05:6402:1d35:: with SMTP id dh21mr74312560edb.186.1594398419152; Fri, 10 Jul 2020 09:26:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594398419; cv=none; d=google.com; s=arc-20160816; b=GX+pmLe/Tte6sJcIHKEbFkjJHT72ddfSmsMZ94X2wTmaAyXHdtn4k/YxSAGwcTlY0x KmmsaERtq9+RVJA2IvB1gHJEn8FVFHQ3AKMoDFggZt2DsqBYFA2R2ndqa0JyDrqoEtcA CCCrFJH2Q3mOYdI3YFF42rdvC4hwbAQ1snP9/OEg8umZU3eW0FkNPIYsECZNxWaavXvx hrg2aRxKMU2PSk477oYWL/YrBFYvnui3k1FykyDze6nwbg1EwNBr8XgXRN3DCoJfxDrD RiNHuE/nSPIgchXxWJLNilju5q2czlEil6AuMLiWv3y8bem35hy9UsAFJvjAA1ECmMmq HvXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:cc:to:from; bh=tNXLVEkAhJs4QCoeDpIEIq+7GbN5XPnCkMB7GgUs3Ro=; b=NNnhL6gXHTSk4l0zQTqducJ+P3U70fpYea19YaKw5Or3Y8asWwI8BD4xNjxDHcq4nP 3ou7l4b5+lReRCOu+MW0rJ9IdocZVNVfTCvzHNWyzPq+IjCpjh0tJGm7v7EWCA8zgbqh n9ym1Pkpyy/GZaDySoureZpIi5X9Cl6VtPKRt/qx88rCbRhwBP8RY+cOE52CGVQo86rt FS/ckdFwf0SNTNT4doHLwIm1e7HJ82E4UsAprD8aZ9lVClMWqcMUbIInvm/8aiiExY/I iE9l1Ez/pPEcaya7lvE7xiwFmORez8meF2A1PwY8CRxC+FXDnbgRhhSuHufDtAm13kky v2xA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from dpdk.org (dpdk.org. [92.243.14.124]) by mx.google.com with ESMTP id qp26si28531ejb.118.2020.07.10.09.26.58; Fri, 10 Jul 2020 09:26:59 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3D9891DD0B; Fri, 10 Jul 2020 18:26:09 +0200 (CEST) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by dpdk.org (Postfix) with ESMTP id 45C6C1DA05 for ; Fri, 10 Jul 2020 18:26:01 +0200 (CEST) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 29E262003D1; Fri, 10 Jul 2020 18:26:01 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 46232201335; Fri, 10 Jul 2020 18:25:59 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id B3102402AE; Sat, 11 Jul 2020 00:25:56 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Hemant Agrawal Date: Fri, 10 Jul 2020 21:51:36 +0530 Message-Id: <20200710162137.22973-8-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200710162137.22973-1-hemant.agrawal@nxp.com> References: <20200710162137.22973-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 8/9] net/dpaa2: support Rxq and Txq info routines X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch add support for rxq_info_get and txq_info_get Signed-off-by: Hemant Agrawal --- drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 7 ++-- drivers/net/dpaa2/dpaa2_ethdev.c | 48 ++++++++++++++++++++++++- 2 files changed, 52 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h index be48462dd..35423df12 100644 --- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h +++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h @@ -167,13 +167,16 @@ struct dpaa2_queue { struct qbman_result *cscn; }; struct rte_event ev; - int32_t eventfd; /*!< Event Fd of this queue */ dpaa2_queue_cb_dqrr_t *cb; dpaa2_queue_cb_eqresp_free_t *cb_eqresp_free; struct dpaa2_bp_info *bp_array; /*to store tx_conf_queue corresponding to tx_queue*/ struct dpaa2_queue *tx_conf_queue; -}; + int32_t eventfd; /*!< Event Fd of this queue */ + uint16_t nb_desc; + uint16_t resv; + uint64_t offloads; +} __rte_cache_aligned; struct swp_active_dqs { struct qbman_result *global_active_dqs; diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c index 33d52efd7..3bd435b45 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.c +++ b/drivers/net/dpaa2/dpaa2_ethdev.c @@ -683,6 +683,8 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id]; dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */ dpaa2_q->bp_array = rte_dpaa2_bpid_info; + dpaa2_q->nb_desc = UINT16_MAX; + dpaa2_q->offloads = rx_conf->offloads; /*Get the flow id from given VQ id*/ flow_id = dpaa2_q->flow_id; @@ -735,7 +737,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, struct dpni_taildrop taildrop; taildrop.enable = 1; - + dpaa2_q->nb_desc = nb_rx_desc; /* Private CGR will use tail drop length as nb_rx_desc. * for rest cases we can use standard byte based tail drop. * There is no HW restriction, but number of CGRs are limited, @@ -825,6 +827,9 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, return -EINVAL; } + dpaa2_q->nb_desc = UINT16_MAX; + dpaa2_q->offloads = tx_conf->offloads; + /* Return if queue already configured */ if (dpaa2_q->flow_id != 0xffff) { dev->data->tx_queues[tx_queue_id] = dpaa2_q; @@ -878,6 +883,8 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, if (!(priv->flags & DPAA2_TX_CGR_OFF)) { struct dpni_congestion_notification_cfg cong_notif_cfg = {0}; + dpaa2_q->nb_desc = nb_tx_desc; + cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES; cong_notif_cfg.threshold_entry = nb_tx_desc; /* Notify that the queue is not congested when the data in @@ -2261,6 +2268,43 @@ dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev, return ret; } +static void +dpaa2_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_rxq_info *qinfo) +{ + struct dpaa2_queue *rxq; + + rxq = (struct dpaa2_queue *)dev->data->rx_queues[queue_id]; + + qinfo->mp = rxq->mb_pool; + qinfo->scattered_rx = dev->data->scattered_rx; + qinfo->nb_desc = rxq->nb_desc; + + qinfo->conf.rx_free_thresh = 1; + qinfo->conf.rx_drop_en = 1; + qinfo->conf.rx_deferred_start = 0; + qinfo->conf.offloads = rxq->offloads; +} + +static void +dpaa2_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_txq_info *qinfo) +{ + struct dpaa2_queue *txq; + + txq = dev->data->tx_queues[queue_id]; + + qinfo->nb_desc = txq->nb_desc; + qinfo->conf.tx_thresh.pthresh = 0; + qinfo->conf.tx_thresh.hthresh = 0; + qinfo->conf.tx_thresh.wthresh = 0; + + qinfo->conf.tx_free_thresh = 0; + qinfo->conf.tx_rs_thresh = 0; + qinfo->conf.offloads = txq->offloads; + qinfo->conf.tx_deferred_start = 0; +} + static struct eth_dev_ops dpaa2_ethdev_ops = { .dev_configure = dpaa2_eth_dev_configure, .dev_start = dpaa2_dev_start, @@ -2302,6 +2346,8 @@ static struct eth_dev_ops dpaa2_ethdev_ops = { .rss_hash_update = dpaa2_dev_rss_hash_update, .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get, .filter_ctrl = dpaa2_dev_flow_ctrl, + .rxq_info_get = dpaa2_rxq_info_get, + .txq_info_get = dpaa2_txq_info_get, #if defined(RTE_LIBRTE_IEEE1588) .timesync_enable = dpaa2_timesync_enable, .timesync_disable = dpaa2_timesync_disable,