diff mbox

[9/9] ARM: dts: vf610: remove the use of pingrp macros

Message ID 1390668191-20289-10-git-send-email-shawn.guo@linaro.org
State New
Headers show

Commit Message

Shawn Guo Jan. 25, 2014, 4:43 p.m. UTC 
We created the pingrp macros in vf610-pingrp.h for purpose of less LOC
when same pin group is used by multiple boards.  However, DT maintainers
take it as an abuse of DTC macro support.  So let's get rid of it to
make the pins used by given device more intuitive.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/boot/dts/vf610-cosmic.dts |   17 ++++-
 arch/arm/boot/dts/vf610-pingrp.h   |  127 ------------------------------------
 arch/arm/boot/dts/vf610-twr.dts    |   42 ++++++++++--
 arch/arm/boot/dts/vf610.dtsi       |    2 +-
 4 files changed, 53 insertions(+), 135 deletions(-)
 delete mode 100644 arch/arm/boot/dts/vf610-pingrp.h
diff mbox

Patch

diff --git a/arch/arm/boot/dts/vf610-cosmic.dts b/arch/arm/boot/dts/vf610-cosmic.dts
index 432960a..3fd1b74 100644
--- a/arch/arm/boot/dts/vf610-cosmic.dts
+++ b/arch/arm/boot/dts/vf610-cosmic.dts
@@ -43,11 +43,24 @@ 
 &iomuxc {
 	vf610-cosmic {
 		pinctrl_fec1: fec1grp {
-			fsl,pins = <VF610_FEC1_PINGRP1>;
+			fsl,pins = <
+				VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2
+				VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3
+				VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1
+				VF610_PAD_PTC12__ENET_RMII_RXD1		0x30d1
+				VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1
+				VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1
+				VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2
+				VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2
+				VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2
+			>;
 		};
 
 		pinctrl_uart1: uart1grp {
-			fsl,pins = <VF610_UART1_PINGRP1>;
+			fsl,pins = <
+				VF610_PAD_PTB4__UART1_TX		0x21a2
+				VF610_PAD_PTB5__UART1_RX		0x21a1
+			>;
 		};
 	};
 };
diff --git a/arch/arm/boot/dts/vf610-pingrp.h b/arch/arm/boot/dts/vf610-pingrp.h
deleted file mode 100644
index 0858f4f..0000000
--- a/arch/arm/boot/dts/vf610-pingrp.h
+++ /dev/null
@@ -1,127 +0,0 @@ 
-/*
- * Copyright (C) 2013 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#ifndef __DTS_VF610_PINGRP_H
-#define __DTS_VF610_PINGRP_H
-
-#include "vf610-pinfunc.h"
-
-#define VF610_DCU0_PINGRP1 \
-	VF610_PAD_PTB8__GPIO_30			0x42 \
-	VF610_PAD_PTE0__DCU0_HSYNC		0x42 \
-	VF610_PAD_PTE1__DCU0_VSYNC		0x42 \
-	VF610_PAD_PTE2__DCU0_PCLK		0x42 \
-	VF610_PAD_PTE4__DCU0_DE			0x42 \
-	VF610_PAD_PTE5__DCU0_R0			0x42 \
-	VF610_PAD_PTE6__DCU0_R1			0x42 \
-	VF610_PAD_PTE7__DCU0_R2			0x42 \
-	VF610_PAD_PTE8__DCU0_R3			0x42 \
-	VF610_PAD_PTE9__DCU0_R4			0x42 \
-	VF610_PAD_PTE10__DCU0_R5		0x42 \
-	VF610_PAD_PTE11__DCU0_R6		0x42 \
-	VF610_PAD_PTE12__DCU0_R7		0x42 \
-	VF610_PAD_PTE13__DCU0_G0		0x42 \
-	VF610_PAD_PTE14__DCU0_G1		0x42 \
-	VF610_PAD_PTE15__DCU0_G2		0x42 \
-	VF610_PAD_PTE16__DCU0_G3		0x42 \
-	VF610_PAD_PTE17__DCU0_G4		0x42 \
-	VF610_PAD_PTE18__DCU0_G5		0x42 \
-	VF610_PAD_PTE19__DCU0_G6		0x42 \
-	VF610_PAD_PTE20__DCU0_G7		0x42 \
-	VF610_PAD_PTE21__DCU0_B0		0x42 \
-	VF610_PAD_PTE22__DCU0_B1		0x42 \
-	VF610_PAD_PTE23__DCU0_B2		0x42 \
-	VF610_PAD_PTE24__DCU0_B3		0x42 \
-	VF610_PAD_PTE25__DCU0_B4		0x42 \
-	VF610_PAD_PTE26__DCU0_B5		0x42 \
-	VF610_PAD_PTE27__DCU0_B6		0x42 \
-	VF610_PAD_PTE28__DCU0_B7		0x42
-
-#define VF610_DSPI0_PINGRP1 \
-	VF610_PAD_PTB19__DSPI0_CS0		0x1182 \
-	VF610_PAD_PTB20__DSPI0_SIN		0x1181 \
-	VF610_PAD_PTB21__DSPI0_SOUT		0x1182 \
-	VF610_PAD_PTB22__DSPI0_SCK		0x1182
-
-#define VF610_ESDHC1_PINGRP1 \
-	VF610_PAD_PTA24__ESDHC1_CLK		0x31ef \
-	VF610_PAD_PTA25__ESDHC1_CMD		0x31ef \
-	VF610_PAD_PTA26__ESDHC1_DAT0		0x31ef \
-	VF610_PAD_PTA27__ESDHC1_DAT1		0x31ef \
-	VF610_PAD_PTA28__ESDHC1_DATA2		0x31ef \
-	VF610_PAD_PTA29__ESDHC1_DAT3		0x31ef \
-	VF610_PAD_PTA7__GPIO_134		0x219d
-
-#define VF610_FEC0_PINGRP1 \
-	VF610_PAD_PTA6__RMII_CLKIN		0x30d1 \
-	VF610_PAD_PTC0__ENET_RMII0_MDC		0x30d3 \
-	VF610_PAD_PTC1__ENET_RMII0_MDIO		0x30d1 \
-	VF610_PAD_PTC2__ENET_RMII0_CRS		0x30d1 \
-	VF610_PAD_PTC3__ENET_RMII0_RXD1		0x30d1 \
-	VF610_PAD_PTC4__ENET_RMII0_RXD0		0x30d1 \
-	VF610_PAD_PTC5__ENET_RMII0_RXER		0x30d1 \
-	VF610_PAD_PTC6__ENET_RMII0_TXD1		0x30d2 \
-	VF610_PAD_PTC7__ENET_RMII0_TXD0		0x30d2 \
-	VF610_PAD_PTC8__ENET_RMII0_TXEN		0x30d2
-
-#define VF610_FEC1_PINGRP1 \
-	VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2 \
-	VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3 \
-	VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1 \
-	VF610_PAD_PTC12__ENET_RMII_RXD1		0x30d1 \
-	VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1 \
-	VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1 \
-	VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2 \
-	VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2 \
-	VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2 \
-
-#define VF610_I2C0_PINGRP1 \
-	VF610_PAD_PTB14__I2C0_SCL		0x30d3 \
-	VF610_PAD_PTB15__I2C0_SDA		0x30d3 \
-
-#define VF610_PWM0_PINGRP1 \
-	VF610_PAD_PTB0__FTM0_CH0		0x1582 \
-	VF610_PAD_PTB1__FTM0_CH1		0x1582 \
-	VF610_PAD_PTB2__FTM0_CH2		0x1582 \
-	VF610_PAD_PTB3__FTM0_CH3		0x1582 \
-	VF610_PAD_PTB6__FTM0_CH6		0x1582 \
-	VF610_PAD_PTB7__FTM0_CH7		0x1582
-
-#define VF610_QSPI0_PINGRP1 \
-	VF610_PAD_PTD0__QSPI0_A_QSCK		0x307b \
-	VF610_PAD_PTD1__QSPI0_A_CS0		0x307f \
-	VF610_PAD_PTD2__QSPI0_A_DATA3		0x3073 \
-	VF610_PAD_PTD3__QSPI0_A_DATA2		0x3073 \
-	VF610_PAD_PTD4__QSPI0_A_DATA1		0x3073 \
-	VF610_PAD_PTD5__QSPI0_A_DATA0		0x307b \
-	VF610_PAD_PTD7__QSPI0_B_QSCK		0x307b \
-	VF610_PAD_PTD8__QSPI0_B_CS0		0x307f \
-	VF610_PAD_PTD9__QSPI0_B_DATA3		0x3073 \
-	VF610_PAD_PTD10__QSPI0_B_DATA2		0x3073 \
-	VF610_PAD_PTD11__QSPI0_B_DATA1		0x3073 \
-	VF610_PAD_PTD12__QSPI0_B_DATA0		0x307b
-
-#define VF610_SAI2_PINGRP1 \
-	VF610_PAD_PTA16__SAI2_TX_BCLK		0x02ed \
-	VF610_PAD_PTA18__SAI2_TX_DATA		0x02ee \
-	VF610_PAD_PTA19__SAI2_TX_SYNC		0x02ed \
-	VF610_PAD_PTA21__SAI2_RX_BCLK		0x02ed \
-	VF610_PAD_PTA22__SAI2_RX_DATA		0x02ed \
-	VF610_PAD_PTA23__SAI2_RX_SYNC		0x02ed \
-	VF610_PAD_PTB18__EXT_AUDIO_MCLK		0x02ed
-
-#define VF610_UART1_PINGRP1 \
-	VF610_PAD_PTB4__UART1_TX		0x21a2 \
-	VF610_PAD_PTB5__UART1_RX		0x21a1
-
-#define VF610_USBVBUS_PINGRP1 \
-	VF610_PAD_PTA24__USB1_VBUS_EN		0x219c \
-	VF610_PAD_PTA16__USB0_VBUS_EN		0x219c
-
-#endif /* __DTS_VF610_PINGRP_H */
diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index 80db14e..e3a3805 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -77,23 +77,55 @@ 
 &iomuxc {
 	vf610-twr {
 		pinctrl_dspi0: dspi0grp {
-			fsl,pins = <VF610_DSPI0_PINGRP1>;
+			fsl,pins = <
+				VF610_PAD_PTB19__DSPI0_CS0		0x1182
+				VF610_PAD_PTB20__DSPI0_SIN		0x1181
+				VF610_PAD_PTB21__DSPI0_SOUT		0x1182
+				VF610_PAD_PTB22__DSPI0_SCK		0x1182
+			>;
 		};
 
 		pinctrl_fec0: fec0grp {
-			fsl,pins = <VF610_FEC0_PINGRP1>;
+			fsl,pins = <
+				VF610_PAD_PTA6__RMII_CLKIN		0x30d1
+				VF610_PAD_PTC0__ENET_RMII0_MDC		0x30d3
+				VF610_PAD_PTC1__ENET_RMII0_MDIO		0x30d1
+				VF610_PAD_PTC2__ENET_RMII0_CRS		0x30d1
+				VF610_PAD_PTC3__ENET_RMII0_RXD1		0x30d1
+				VF610_PAD_PTC4__ENET_RMII0_RXD0		0x30d1
+				VF610_PAD_PTC5__ENET_RMII0_RXER		0x30d1
+				VF610_PAD_PTC6__ENET_RMII0_TXD1		0x30d2
+				VF610_PAD_PTC7__ENET_RMII0_TXD0		0x30d2
+				VF610_PAD_PTC8__ENET_RMII0_TXEN		0x30d2
+			>;
 		};
 
 		pinctrl_fec1: fec1grp {
-			fsl,pins = <VF610_FEC1_PINGRP1>;
+			fsl,pins = <
+				VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2
+				VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3
+				VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1
+				VF610_PAD_PTC12__ENET_RMII_RXD1		0x30d1
+				VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1
+				VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1
+				VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2
+				VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2
+				VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2
+			>;
 		};
 
 		pinctrl_i2c0: i2c0grp {
-			fsl,pins = <VF610_I2C0_PINGRP1>;
+			fsl,pins = <
+				VF610_PAD_PTB14__I2C0_SCL		0x30d3
+				VF610_PAD_PTB15__I2C0_SDA		0x30d3
+			>;
 		};
 
 		pinctrl_uart1: uart1grp {
-			fsl,pins = <VF610_UART1_PINGRP1>;
+			fsl,pins = <
+				VF610_PAD_PTB4__UART1_TX		0x21a2
+				VF610_PAD_PTB5__UART1_RX		0x21a1
+			>;
 		};
 	};
 };
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index ef8a0ee..183943e 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -8,7 +8,7 @@ 
  */
 
 #include "skeleton.dtsi"
-#include "vf610-pingrp.h"
+#include "vf610-pinfunc.h"
 #include <dt-bindings/clock/vf610-clock.h>
 
 / {