diff mbox series

armv8: ls1028a: define esdhc_status_fixup

Message ID 20200414092448.35332-1-xiaowei.bao@nxp.com
State New
Headers show
Series armv8: ls1028a: define esdhc_status_fixup | expand

Commit Message

Xiaowei Bao April 14, 2020, 9:24 a.m. UTC 
From: Yinbo Zhu <yinbo.zhu at nxp.com>

This patch is to define esdhc_status_fixup function for ls1028a to disable
SDHC1/SDHC2 status in device tree node if not selected.

Signed-off-by: Yinbo Zhu <yinbo.zhu at nxp.com>
Signed-off-by: Xiaowei Bao <xiaowei.bao at nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu at nxp.com>
---
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  5 +++
 board/freescale/ls1028a/ls1028a.c                  | 40 ++++++++++++++++++++++
 2 files changed, 45 insertions(+)

Comments

Priyanka Jain (OSS) April 21, 2020, 10:15 a.m. UTC | #1 
>-----Original Message-----
>From: U-Boot <u-boot-bounces at lists.denx.de> On Behalf Of Xiaowei Bao
>Sent: Tuesday, April 14, 2020 2:55 PM
>To: Sudhanshu Gupta <sudhanshu.gupta at nxp.com>; Harninder Rai
><harninder.rai at nxp.com>; rajesh.bhagat at nxp.co; Andy Tang
><andy.tang at nxp.com>; u-boot at lists.denx.de
>Cc: Yinbo Zhu <yinbo.zhu at nxp.com>; Xiaowei Bao <xiaowei.bao at nxp.com>;
>Y.b. Lu <yangbo.lu at nxp.com>
>Subject: [PATCH] armv8: ls1028a: define esdhc_status_fixup
>
>From: Yinbo Zhu <yinbo.zhu at nxp.com>
>
>This patch is to define esdhc_status_fixup function for ls1028a to disable
>SDHC1/SDHC2 status in device tree node if not selected.
>
>Signed-off-by: Yinbo Zhu <yinbo.zhu at nxp.com>
>Signed-off-by: Xiaowei Bao <xiaowei.bao at nxp.com>
>Signed-off-by: Yangbo Lu <yangbo.lu at nxp.com>
>---
Applied to fsl-qoriq. Awaiting upstream.

Thanks
Priyanka
diff mbox series

Patch

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 299201b..c2fbc23 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -232,7 +232,12 @@ 
 #define DCFG_PORSR1			0x000
 #define DCFG_PORSR1_RCW_SRC		0xff800000
 #define DCFG_PORSR1_RCW_SRC_NOR		0x12f00000
+#define DCFG_RCWSR12			0x12c
+#define DCFG_RCWSR12_SDHC_SHIFT		24
+#define DCFG_RCWSR12_SDHC_MASK		0x7
 #define DCFG_RCWSR13			0x130
+#define DCFG_RCWSR13_SDHC_SHIFT		3
+#define DCFG_RCWSR13_SDHC_MASK		0x7
 #define DCFG_RCWSR13_DSPI		(0 << 8)
 #define DCFG_RCWSR15			0x138
 #define DCFG_RCWSR15_IFCGRPABASE_QSPI	0x3
diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c
index aa93534..a8bdd12 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -135,6 +135,46 @@  void detail_board_ddr_info(void)
 	print_ddr_info(0);
 }
 
+int esdhc_status_fixup(void *blob, const char *compat)
+{
+	void __iomem *dcfg_ccsr = (void __iomem *)DCFG_BASE;
+	char esdhc1_path[] = "/soc/mmc at 2140000";
+	char esdhc2_path[] = "/soc/mmc at 2150000";
+	char dspi1_path[] = "/soc/spi at 2100000";
+	char dspi2_path[] = "/soc/spi at 2110000";
+	u32 mux_sdhc1, mux_sdhc2;
+	u32 io = 0;
+
+	/*
+	 * The PMUX IO-expander for mux select is used to control
+	 * the muxing of various onboard interfaces.
+	 */
+
+	io = in_le32(dcfg_ccsr + DCFG_RCWSR12);
+	mux_sdhc1 = (io >> DCFG_RCWSR12_SDHC_SHIFT) & DCFG_RCWSR12_SDHC_MASK;
+
+	/* Disable esdhc1/dspi1 if not selected. */
+	if (mux_sdhc1 != 0)
+		do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
+				 sizeof("disabled"), 1);
+	if (mux_sdhc1 != 2)
+		do_fixup_by_path(blob, dspi1_path, "status", "disabled",
+				 sizeof("disabled"), 1);
+
+	io = in_le32(dcfg_ccsr + DCFG_RCWSR13);
+	mux_sdhc2 = (io >> DCFG_RCWSR13_SDHC_SHIFT) & DCFG_RCWSR13_SDHC_MASK;
+
+	/* Disable esdhc2/dspi2 if not selected. */
+	if (mux_sdhc2 != 0)
+		do_fixup_by_path(blob, esdhc2_path, "status", "disabled",
+				 sizeof("disabled"), 1);
+	if (mux_sdhc2 != 2)
+		do_fixup_by_path(blob, dspi2_path, "status", "disabled",
+				 sizeof("disabled"), 1);
+
+	return 0;
+}
+
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, bd_t *bd)
 {