diff mbox series

[v2] arm: dts: uDPU: switch default PHY speed to 3.125Gbit

Message ID 20200424092408.1075981-1-jakov.petrina@sartura.hr
State Accepted
Commit f49ac7e1c4107b88f30ab34b039e1c7ebff2d469
Headers show
Series [v2] arm: dts: uDPU: switch default PHY speed to 3.125Gbit | expand

Commit Message

Jakov Petrina April 24, 2020, 9:24 a.m. UTC 
This resolves issues with certain SFP modules.

Signed-off-by: Jakov Petrina <jakov.petrina at sartura.hr>
Signed-off-by: Vladimir Vid <vladimir.vid at sartura.hr>
---

v2:
- changed PHY mode as well

 arch/arm/dts/armada-3720-uDPU.dts | 18 ++++++------------
 1 file changed, 6 insertions(+), 12 deletions(-)

Comments

Stefan Roese May 4, 2020, 5:02 a.m. UTC | #1 
On 24.04.20 11:24, Jakov Petrina wrote:
> This resolves issues with certain SFP modules.
> 
> Signed-off-by: Jakov Petrina <jakov.petrina at sartura.hr>
> Signed-off-by: Vladimir Vid <vladimir.vid at sartura.hr>
> ---
> 
> v2:
> - changed PHY mode as well

Reviewed-by: Stefan Roese <sr at denx.de>

Thanks,
Stefan

>   arch/arm/dts/armada-3720-uDPU.dts | 18 ++++++------------
>   1 file changed, 6 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts
> index 683dac2a7c..07c7b91175 100644
> --- a/arch/arm/dts/armada-3720-uDPU.dts
> +++ b/arch/arm/dts/armada-3720-uDPU.dts
> @@ -109,11 +109,11 @@
>   &comphy {
>   	phy0 {
>   		phy-type = <PHY_TYPE_SGMII1>;
> -		phy-speed = <PHY_SPEED_1_25G>;
> +		phy-speed = <PHY_SPEED_3_125G>;
>   	};
>           phy1 {
>                   phy-type = <PHY_TYPE_SGMII0>;
> -                phy-speed = <PHY_SPEED_1_25G>;
> +                phy-speed = <PHY_SPEED_3_125G>;
>           };
>   
>           phy2 {
> @@ -125,22 +125,16 @@
>   &eth0 {
>   	pinctrl-0 = <&pcie_pins>;
>   	status = "okay";
> -	phy-mode = "sgmii";
> +	phy-mode = "2500base-x";
> +	managed = "in-band-status";
>   	phy = <&ethphy0>;
> -	fixed-link {
> -		speed = <1000>;
> -		full-duplex;
> -	};
>   };
>   
>   &eth1 {
>   	status = "okay";
> -	phy-mode = "sgmii";
> +	phy-mode = "2500base-x";
> +	managed = "in-band-status";
>   	phy = <&ethphy1>;
> -	fixed-link {
> -		speed = <1000>;
> -		full-duplex;
> -	};
>   };
>   
>   &i2c0 {
> 


Viele Gr??e,
Stefan
Stefan Roese May 26, 2020, 2:04 p.m. UTC | #2 
On 24.04.20 11:24, Jakov Petrina wrote:
> This resolves issues with certain SFP modules.
> 
> Signed-off-by: Jakov Petrina <jakov.petrina at sartura.hr>
> Signed-off-by: Vladimir Vid <vladimir.vid at sartura.hr>
> ---
> 
> v2:
> - changed PHY mode as well

Reviewed-by: Stefan Roese <sr at denx.de>

Thanks,
Stefan

>   arch/arm/dts/armada-3720-uDPU.dts | 18 ++++++------------
>   1 file changed, 6 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts
> index 683dac2a7c..07c7b91175 100644
> --- a/arch/arm/dts/armada-3720-uDPU.dts
> +++ b/arch/arm/dts/armada-3720-uDPU.dts
> @@ -109,11 +109,11 @@
>   &comphy {
>   	phy0 {
>   		phy-type = <PHY_TYPE_SGMII1>;
> -		phy-speed = <PHY_SPEED_1_25G>;
> +		phy-speed = <PHY_SPEED_3_125G>;
>   	};
>           phy1 {
>                   phy-type = <PHY_TYPE_SGMII0>;
> -                phy-speed = <PHY_SPEED_1_25G>;
> +                phy-speed = <PHY_SPEED_3_125G>;
>           };
>   
>           phy2 {
> @@ -125,22 +125,16 @@
>   &eth0 {
>   	pinctrl-0 = <&pcie_pins>;
>   	status = "okay";
> -	phy-mode = "sgmii";
> +	phy-mode = "2500base-x";
> +	managed = "in-band-status";
>   	phy = <&ethphy0>;
> -	fixed-link {
> -		speed = <1000>;
> -		full-duplex;
> -	};
>   };
>   
>   &eth1 {
>   	status = "okay";
> -	phy-mode = "sgmii";
> +	phy-mode = "2500base-x";
> +	managed = "in-band-status";
>   	phy = <&ethphy1>;
> -	fixed-link {
> -		speed = <1000>;
> -		full-duplex;
> -	};
>   };
>   
>   &i2c0 {
> 


Viele Gr??e,
Stefan
diff mbox series

Patch

diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts
index 683dac2a7c..07c7b91175 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -109,11 +109,11 @@ 
 &comphy {
 	phy0 {
 		phy-type = <PHY_TYPE_SGMII1>;
-		phy-speed = <PHY_SPEED_1_25G>;
+		phy-speed = <PHY_SPEED_3_125G>;
 	};
         phy1 {
                 phy-type = <PHY_TYPE_SGMII0>;
-                phy-speed = <PHY_SPEED_1_25G>;
+                phy-speed = <PHY_SPEED_3_125G>;
         };
 
         phy2 {
@@ -125,22 +125,16 @@ 
 &eth0 {
 	pinctrl-0 = <&pcie_pins>;
 	status = "okay";
-	phy-mode = "sgmii";
+	phy-mode = "2500base-x";
+	managed = "in-band-status";
 	phy = <&ethphy0>;
-	fixed-link {
-		speed = <1000>;
-		full-duplex;
-	};
 };
 
 &eth1 {
 	status = "okay";
-	phy-mode = "sgmii";
+	phy-mode = "2500base-x";
+	managed = "in-band-status";
 	phy = <&ethphy1>;
-	fixed-link {
-		speed = <1000>;
-		full-duplex;
-	};
 };
 
 &i2c0 {