diff mbox series

[v3] armv8: fsl-layerscape: LS1044A/1048A: enable Only 1x 10GE port

Message ID 1578559982-23178-1-git-send-email-pramod.kumar_1@nxp.com
State Accepted
Commit 0b7435107b6b376e4f458db986fe17b14a7e85f7
Headers show
Series [v3] armv8: fsl-layerscape: LS1044A/1048A: enable Only 1x 10GE port | expand

Commit Message

Pramod Kumar Jan. 9, 2020, 8:53 a.m. UTC 
LS1044A, LS1048A are LS1088A personalities, which support only one
1x 10GE port.
MAC1 and MAC2 are associated with 1G SGMII, 2.5G SGMII, and XFI.
Disable MAC1 to have only one 1x 10GE port for LS1044A, LS1048A.

Signed-off-by: Pramod Kumar <pramod.kumar_1 at nxp.com>
---
Changes in v3: 
  - updated commit message 

Changes in v2: 
  - incorporate review comments 

 arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c | 23 ++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

Comments

Priyanka Jain Jan. 27, 2020, 6:08 a.m. UTC | #1 
>-----Original Message-----
>From: Pramod Kumar <pramod.kumar_1 at nxp.com>
>Sent: Thursday, January 9, 2020 2:23 PM
>To: u-boot at lists.denx.de
>Cc: Priyanka Jain <priyanka.jain at nxp.com>; Pramod Kumar
><pramod.kumar_1 at nxp.com>
>Subject: [PATCH v3] armv8: fsl-layerscape: LS1044A/1048A: enable Only 1x
>10GE port
>
>LS1044A, LS1048A are LS1088A personalities, which support only one 1x 10GE
>port.
>MAC1 and MAC2 are associated with 1G SGMII, 2.5G SGMII, and XFI.
>Disable MAC1 to have only one 1x 10GE port for LS1044A, LS1048A.
>
>Signed-off-by: Pramod Kumar <pramod.kumar_1 at nxp.com>
>---
patch applied (after squashing http://patchwork.ozlabs.org/patch/1220240/) in u-boot-fsl-qoriq/master
-priyankajain
diff mbox series

Patch

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c
index 8e8b45a..67d97f8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c
@@ -1,10 +1,12 @@ 
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2019 NXP
  */
 
 #include <common.h>
 #include <asm/arch/fsl_serdes.h>
+#include <asm/arch/soc.h>
+#include <asm/io.h>
 
 struct serdes_config {
 	u8 ip_protocol;
@@ -32,6 +34,7 @@  static struct serdes_config serdes1_cfg_tbl[] = {
 	{0x3A, {SGMII3, PCIE1, SGMII1, SGMII2 }, {3, 5, 3, 3 } },
 		{}
 };
+
 static struct serdes_config serdes2_cfg_tbl[] = {
 	/* SerDes 2 */
 	{0x0C, {PCIE1, PCIE1, PCIE1, PCIE1 }, {8, 8, 8, 8 } },
@@ -48,6 +51,15 @@  static struct serdes_config *serdes_cfg_tbl[] = {
 	serdes2_cfg_tbl,
 };
 
+bool soc_has_mac1(void)
+{
+	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+	unsigned int svr = gur_in32(&gur->svr);
+	unsigned int version = SVR_SOC_VER(svr);
+
+	return version == SVR_LS1088A;
+}
+
 int serdes_get_number(int serdes, int cfg)
 {
 	struct serdes_config *ptr;
@@ -87,7 +99,14 @@  enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
 
 	if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
 		return 0;
-
+	/*
+	 * LS1044A/1048A  support only one XFI port
+	 * Disable MAC1 for LS1044A/1048A
+	 */
+	if (serdes == FSL_SRDS_1 && lane == 2) {
+		if (!soc_has_mac1())
+			return 0;
+	}
 	ptr = serdes_cfg_tbl[serdes];
 	while (ptr->ip_protocol) {
 		if (ptr->ip_protocol == cfg)