common: fix regression on block cache init

From: Angelo Durgehello <angelo.dureghello at timesys.com>

m68k needs block cache list initialized after relocation.
Other architectures must not be involved.

Fixing regression related to:

commit 1526bcce0f7285087621e16e6720636d01839da8
	("common: add blkcache init")

Signed-off-by: Angelo Durgehello <angelo.dureghello at timesys.com>
---
 common/board_r.c         | 2 +-
 drivers/block/blkcache.c | 6 ++++++
 2 files changed, 7 insertions(+), 1 deletion(-)

On Sun, Jan 26, 2020 at 07:31:22PM +0100, Angelo Dureghello wrote:

> From: Angelo Durgehello <angelo.dureghello at timesys.com>
> 
> m68k needs block cache list initialized after relocation.
> Other architectures must not be involved.
> 
> Fixing regression related to:
> 
> commit 1526bcce0f7285087621e16e6720636d01839da8
> 	("common: add blkcache init")
> 
> Signed-off-by: Angelo Durgehello <angelo.dureghello at timesys.com>

Applied to u-boot/master, thanks!

On Sun, Jan 26, 2020 at 7:30 PM Angelo Dureghello
<angelo.dureghello at timesys.com> wrote:
>
> From: Angelo Durgehello <angelo.dureghello at timesys.com>
>
> m68k needs block cache list initialized after relocation.
> Other architectures must not be involved.
>
> Fixing regression related to:
>
> commit 1526bcce0f7285087621e16e6720636d01839da8
>         ("common: add blkcache init")
>
> Signed-off-by: Angelo Durgehello <angelo.dureghello at timesys.com>
> ---
>  common/board_r.c         | 2 +-
>  drivers/block/blkcache.c | 6 ++++++
>  2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/common/board_r.c b/common/board_r.c
> index 4f56c19fcc..0bbeaa7594 100644
> --- a/common/board_r.c
> +++ b/common/board_r.c
> @@ -865,7 +865,7 @@ static init_fnc_t init_sequence_r[] = {
>  #if defined(CONFIG_PRAM)
>         initr_mem,
>  #endif
> -#ifdef CONFIG_BLOCK_CACHE
> +#if defined(CONFIG_M68K) && defined(CONFIG_BLOCK_CACHE)

Sorry for not reacting earlier here, but is this really M68K specific?
Or would COFIG_NEES_MANUAL_RELOC be a better fit?

Regards,
Simon

>         blkcache_init,
>  #endif
>         run_main_loop,
> diff --git a/drivers/block/blkcache.c b/drivers/block/blkcache.c
> index f603aa129d..ea40929e3e 100644
> --- a/drivers/block/blkcache.c
> +++ b/drivers/block/blkcache.c
> @@ -21,19 +21,25 @@ struct block_cache_node {
>         char *cache;
>  };
>
> +#ifndef CONFIG_M68K
> +static LIST_HEAD(block_cache);
> +#else
>  static struct list_head block_cache;
> +#endif
>
>  static struct block_cache_stats _stats = {
>         .max_blocks_per_entry = 8,
>         .max_entries = 32
>  };
>
> +#ifdef CONFIG_M68K
>  int blkcache_init(void)
>  {
>         INIT_LIST_HEAD(&block_cache);
>
>         return 0;
>  }
> +#endif
>
>  static struct block_cache_node *cache_find(int iftype, int devnum,
>                                            lbaint_t start, lbaint_t blkcnt,
> --
> 2.24.1
>

Hi Angelo,

On Sun, Jan 26, 2020 at 3:30 PM Angelo Dureghello
<angelo.dureghello at timesys.com> wrote:
>
> From: Angelo Durgehello <angelo.dureghello at timesys.com>
>
> m68k needs block cache list initialized after relocation.
> Other architectures must not be involved.
>
> Fixing regression related to:
>
> commit 1526bcce0f7285087621e16e6720636d01839da8
>         ("common: add blkcache init")
>
> Signed-off-by: Angelo Durgehello <angelo.dureghello at timesys.com>

Next time, please consider adding a Reported-by tag.

Thanks

Hi Fabio,

sure, thanks.

Regards,
Angelo


On Mon, Jan 27, 2020 at 11:15 AM Fabio Estevam <festevam at gmail.com> wrote:
>
> Hi Angelo,
>
> On Sun, Jan 26, 2020 at 3:30 PM Angelo Dureghello
> <angelo.dureghello at timesys.com> wrote:
> >
> > From: Angelo Durgehello <angelo.dureghello at timesys.com>
> >
> > m68k needs block cache list initialized after relocation.
> > Other architectures must not be involved.
> >
> > Fixing regression related to:
> >
> > commit 1526bcce0f7285087621e16e6720636d01839da8
> >         ("common: add blkcache init")
> >
> > Signed-off-by: Angelo Durgehello <angelo.dureghello at timesys.com>
>
> Next time, please consider adding a Reported-by tag.
>
> Thanks



--
Angelo Dureghello
Timesys
email: angelo.dureghello at timesys.com
cell.:  +39 388 8550663