diff mbox series

[2/3] msm_serial: Read bit rate register value from DT

Message ID 20200706083756.6013-2-robert.marko@sartura.hr
State Accepted
Commit 185dcf7f56dde4953ccb8b43355355e86376efb8
Headers show
Series [1/3] arm: Add support for Qualcomm IPQ40xx family | expand

Commit Message

Robert Marko July 6, 2020, 8:37 a.m. UTC
IPQ40xx and currently supported Snapdragon boards don't use the same one
so enable reading it from DT, if no DT property is found default value
is the same as the previous define.

Signed-off-by: Robert Marko <robert.marko at sartura.hr>
---
 doc/device-tree-bindings/serial/msm-serial.txt | 4 ++++
 drivers/serial/serial_msm.c                    | 6 +++++-
 2 files changed, 9 insertions(+), 1 deletion(-)

Comments

Tom Rini July 10, 2020, 3:26 p.m. UTC | #1
On Mon, Jul 06, 2020 at 10:37:55AM +0200, Robert Marko wrote:

> IPQ40xx and currently supported Snapdragon boards don't use the same one
> so enable reading it from DT, if no DT property is found default value
> is the same as the previous define.
> 
> Signed-off-by: Robert Marko <robert.marko at sartura.hr>
> ---
>  doc/device-tree-bindings/serial/msm-serial.txt | 4 ++++
>  drivers/serial/serial_msm.c                    | 6 +++++-
>  2 files changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/doc/device-tree-bindings/serial/msm-serial.txt b/doc/device-tree-bindings/serial/msm-serial.txt
> index 48b8428aca..dca995798a 100644
> --- a/doc/device-tree-bindings/serial/msm-serial.txt
> +++ b/doc/device-tree-bindings/serial/msm-serial.txt
> @@ -4,3 +4,7 @@ Required properties:
>  - compatible: must be "qcom,msm-uartdm-v1.4"
>  - reg: start address and size of the registers
>  - clock: interface clock (must accept baudrate as a frequency)
> +
> +Optional properties:
> +- bit-rate: Data Mover bit rate register value
> +			(If not defined then 0xCC is used as default)
> diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
> index 0cc1aadce4..a32de373d7 100644
> --- a/drivers/serial/serial_msm.c
> +++ b/drivers/serial/serial_msm.c
> @@ -61,6 +61,7 @@ struct msm_serial_data {
>  	phys_addr_t base;
>  	unsigned chars_cnt; /* number of buffered chars */
>  	uint32_t chars_buf; /* buffered chars */
> +	uint32_t clk_bit_rate; /* data mover mode bit rate register value */
>  };
>  
>  static int msm_serial_fetch(struct udevice *dev)
> @@ -190,7 +191,7 @@ static int msm_uart_clk_init(struct udevice *dev)
>  
>  static void uart_dm_init(struct msm_serial_data *priv)
>  {
> -	writel(UART_DM_CLK_RX_TX_BIT_RATE, priv->base + UARTDM_CSR);
> +	writel(priv->clk_bit_rate, priv->base + UARTDM_CSR);
>  	writel(0x0, priv->base + UARTDM_MR1);
>  	writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2);
>  	writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR);
> @@ -223,6 +224,9 @@ static int msm_serial_ofdata_to_platdata(struct udevice *dev)
>  	if (priv->base == FDT_ADDR_T_NONE)
>  		return -EINVAL;
>  
> +	priv->clk_bit_rate = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), 
> +							"bit-rate", UART_DM_CLK_RX_TX_BIT_RATE);
> +
>  	return 0;
>  }

Adding the maintainer.
Ramon Fried July 12, 2020, 4:31 a.m. UTC | #2
On Mon, Jul 6, 2020 at 11:38 AM Robert Marko <robert.marko at sartura.hr> wrote:
>
> IPQ40xx and currently supported Snapdragon boards don't use the same one
> so enable reading it from DT, if no DT property is found default value
> is the same as the previous define.
>
> Signed-off-by: Robert Marko <robert.marko at sartura.hr>
> ---
>  doc/device-tree-bindings/serial/msm-serial.txt | 4 ++++
>  drivers/serial/serial_msm.c                    | 6 +++++-
>  2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/doc/device-tree-bindings/serial/msm-serial.txt b/doc/device-tree-bindings/serial/msm-serial.txt
> index 48b8428aca..dca995798a 100644
> --- a/doc/device-tree-bindings/serial/msm-serial.txt
> +++ b/doc/device-tree-bindings/serial/msm-serial.txt
> @@ -4,3 +4,7 @@ Required properties:
>  - compatible: must be "qcom,msm-uartdm-v1.4"
>  - reg: start address and size of the registers
>  - clock: interface clock (must accept baudrate as a frequency)
> +
> +Optional properties:
> +- bit-rate: Data Mover bit rate register value
> +                       (If not defined then 0xCC is used as default)
> diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
> index 0cc1aadce4..a32de373d7 100644
> --- a/drivers/serial/serial_msm.c
> +++ b/drivers/serial/serial_msm.c
> @@ -61,6 +61,7 @@ struct msm_serial_data {
>         phys_addr_t base;
>         unsigned chars_cnt; /* number of buffered chars */
>         uint32_t chars_buf; /* buffered chars */
> +       uint32_t clk_bit_rate; /* data mover mode bit rate register value */
>  };
>
>  static int msm_serial_fetch(struct udevice *dev)
> @@ -190,7 +191,7 @@ static int msm_uart_clk_init(struct udevice *dev)
>
>  static void uart_dm_init(struct msm_serial_data *priv)
>  {
> -       writel(UART_DM_CLK_RX_TX_BIT_RATE, priv->base + UARTDM_CSR);
> +       writel(priv->clk_bit_rate, priv->base + UARTDM_CSR);
>         writel(0x0, priv->base + UARTDM_MR1);
>         writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2);
>         writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR);
> @@ -223,6 +224,9 @@ static int msm_serial_ofdata_to_platdata(struct udevice *dev)
>         if (priv->base == FDT_ADDR_T_NONE)
>                 return -EINVAL;
>
> +       priv->clk_bit_rate = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
> +                                                       "bit-rate", UART_DM_CLK_RX_TX_BIT_RATE);
> +
>         return 0;
>  }
>
> --
> 2.26.2
>

Reviewed-By: Ramon Fried <rfried.dev at gmail.com>
Tom Rini July 29, 2020, 1:43 p.m. UTC | #3
On Mon, Jul 06, 2020 at 10:37:55AM +0200, Robert Marko wrote:

> IPQ40xx and currently supported Snapdragon boards don't use the same one

> so enable reading it from DT, if no DT property is found default value

> is the same as the previous define.

> 

> Signed-off-by: Robert Marko <robert.marko@sartura.hr>

> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>


Applied to u-boot/master, thanks!

-- 
Tom
diff mbox series

Patch

diff --git a/doc/device-tree-bindings/serial/msm-serial.txt b/doc/device-tree-bindings/serial/msm-serial.txt
index 48b8428aca..dca995798a 100644
--- a/doc/device-tree-bindings/serial/msm-serial.txt
+++ b/doc/device-tree-bindings/serial/msm-serial.txt
@@ -4,3 +4,7 @@  Required properties:
 - compatible: must be "qcom,msm-uartdm-v1.4"
 - reg: start address and size of the registers
 - clock: interface clock (must accept baudrate as a frequency)
+
+Optional properties:
+- bit-rate: Data Mover bit rate register value
+			(If not defined then 0xCC is used as default)
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
index 0cc1aadce4..a32de373d7 100644
--- a/drivers/serial/serial_msm.c
+++ b/drivers/serial/serial_msm.c
@@ -61,6 +61,7 @@  struct msm_serial_data {
 	phys_addr_t base;
 	unsigned chars_cnt; /* number of buffered chars */
 	uint32_t chars_buf; /* buffered chars */
+	uint32_t clk_bit_rate; /* data mover mode bit rate register value */
 };
 
 static int msm_serial_fetch(struct udevice *dev)
@@ -190,7 +191,7 @@  static int msm_uart_clk_init(struct udevice *dev)
 
 static void uart_dm_init(struct msm_serial_data *priv)
 {
-	writel(UART_DM_CLK_RX_TX_BIT_RATE, priv->base + UARTDM_CSR);
+	writel(priv->clk_bit_rate, priv->base + UARTDM_CSR);
 	writel(0x0, priv->base + UARTDM_MR1);
 	writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2);
 	writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR);
@@ -223,6 +224,9 @@  static int msm_serial_ofdata_to_platdata(struct udevice *dev)
 	if (priv->base == FDT_ADDR_T_NONE)
 		return -EINVAL;
 
+	priv->clk_bit_rate = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), 
+							"bit-rate", UART_DM_CLK_RX_TX_BIT_RATE);
+
 	return 0;
 }